Re: Green Compiler ?

glen herrmannsfeldt <gah@ugcs.caltech.edu>
Wed, 2 Jan 2013 05:11:40 +0000 (UTC)

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Related articles
[13 earlier articles]
Re: Green Compiler ? gneuner2@comcast.net (George Neuner) (2012-12-28)
Re: Green Compiler ? z80eu@arcor.de (Peter Dassow) (2012-12-29)
Re: Green Compiler ? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2012-12-30)
Re: Green Compiler ? mailbox@dmitry-kazakov.de (Dmitry A. Kazakov) (2012-12-30)
Re: Green Compiler ? gneuner2@comcast.net (George Neuner) (2012-12-31)
Re: Green Compiler ? jthorn@astro.indiana.edu (Jonathan Thornburg) (2013-01-02)
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2013-01-02)
Re: Green Compiler ? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2013-01-02)
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2013-01-02)
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2013-01-02)
Re: Green Compiler ? numerist@aquaporin4.com (Charles Richmond) (2013-01-04)
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From: glen herrmannsfeldt <gah@ugcs.caltech.edu>
Newsgroups: comp.compilers
Date: Wed, 2 Jan 2013 05:11:40 +0000 (UTC)
Organization: Aioe.org NNTP Server
References: 12-12-010 12-12-012 12-12-022 12-12-028 12-12-034 12-12-037 13-01-002
Keywords: architecture, performance, comment

George Neuner <gneuner2@comcast.net> wrote:


(snip)
> My opinions are colored by experience with DSPs, but I have long
> thought that it would be helpful to have a few K-words of non-cache
> scratchpad memory very close (1..2 cycles) to the CPU.


You mean like the vector registers of the Cray-1?


It seems that vector processors are not out of fashion, though not so
obvious that they couldn't come back.


They work especially well with the pipelined ALU that the Cray
series used.


-- glen
[It is my impression that vector processors went out of fashion when
they figured out how to build instruction pipelines deep enough to
keep execution units busy with scalar code. The context switch
problems were and are severe, unless you want to manage a pool
of scratchpads for active processes, and spill as needed, sort of
like the way x86 processors do floating point register management.
-John]


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