Related articles |
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[9 earlier articles] |
Re: Green Compiler ? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2012-12-28) |
Re: Green Compiler ? walter@bytecraft.com (Walter Banks) (2012-12-28) |
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2012-12-28) |
Re: Green Compiler ? anton@mips.complang.tuwien.ac.at (2012-12-28) |
Re: Green Compiler ? gneuner2@comcast.net (George Neuner) (2012-12-28) |
Re: Green Compiler ? z80eu@arcor.de (Peter Dassow) (2012-12-29) |
Re: Green Compiler ? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2012-12-30) |
Re: Green Compiler ? mailbox@dmitry-kazakov.de (Dmitry A. Kazakov) (2012-12-30) |
Re: Green Compiler ? gneuner2@comcast.net (George Neuner) (2012-12-31) |
Re: Green Compiler ? jthorn@astro.indiana.edu (Jonathan Thornburg) (2013-01-02) |
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2013-01-02) |
Re: Green Compiler ? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2013-01-02) |
Re: Green Compiler ? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2013-01-02) |
[2 later articles] |
From: | Hans-Peter Diettrich <DrDiettrich1@aol.com> |
Newsgroups: | comp.compilers |
Date: | Sun, 30 Dec 2012 08:14:26 +0100 |
Organization: | Compilers Central |
References: | 12-12-010 12-12-012 12-12-022 12-12-028 12-12-034 |
Keywords: | code, performance |
Posted-Date: | 30 Dec 2012 16:38:21 EST |
Peter Dassow schrieb:
> On 28.12.2012 08:35, Hans-Peter Diettrich wrote:
>>
>> Please note that most CMOS processor power consumption results from
>> switching (stray) capacities, and only a small percentage for leak
>> currents. E.g. a register or gate consumes such power whenever a bit is
>> changed, and almost nothing when it has reached an stable state.
>>
> So using extensively registers instead of "conventional" memory (e.g.
> DDR-RAM, memory outside a CPU) will save energy (if equal functionality
> is given) ?
I don't see a relationship here, except that external memory is slow
and [in x86] a couple of caches and address translations are involved
in reading from RAM. But registers are a very scarce resource, so that
frequent loading from memory is hardly avoidable. Register usage is
already optimized by every (good) compiler, reducing runtime and power
consuption at the same time. This was a very narrow bottleneck of the
IA-32 architecture, until the 64 bit (AMD) model increased the number
of registers considerably (16 addressable, of 128 [256?] shadow
registers). The CPU computation circuitry and usage is the same,
regardless of the operand sources.
DoDi
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