From: | rpw3@rpw3.org (Rob Warnock) |
Newsgroups: | comp.compilers,comp.arch |
Date: | Mon, 08 Dec 2008 03:27:48 -0600 |
Organization: | Rob Warnock, Consulting Systems Architect |
References: | 08-12-014 08-12-016 08-12-019 |
Keywords: | architecture, history, algol60 |
Posted-Date: | 08 Dec 2008 05:48:47 EST |
+---------------
| [Actually, the machine with the timer to break indirect address loops was
| the GE 635. The -10 could take an interrupt each time it did an indirect
| address, abandoning the instruction in progress which would restart when
| the interrupt returned. This meant that an individual program could hang
| due to address loops, but the system wouldn't. Add in chains of execute
| instructions, and you could do Algol thunks in one instruction. -John]
+---------------
Similarly, the PDP-10 Algol compiler used Iliffe vectors for arrays,
and using multi-level indirection with indexing on a different
accumulator for each level. Assuming all of the subscripts were
in registers, the PDP-10 could then do do multi-dimensional array
references in a single instruction, e.g.:
ADD T0, @ARRAY_P1(T1) ; t0 := t0 + Array[t1, t2, t3, ...]
-Rob
-----
Rob Warnock <rpw3@rpw3.org>
627 26th Avenue <URL:http://rpw3.org/>
San Mateo, CA 94403 (650)572-2607
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