Re: New assembly language instructions to support OO languages?

Glen Herrmannsfeldt <gah@ugcs.caltech.edu>
Thu, 04 Dec 2008 18:29:38 -0700

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Related articles
New assembly language instructions to support OO languages? tony@my.net (Tony) (2008-12-04)
Re: New assembly language instructions to support OO languages? bert.hutchings@btinternet.com (bert) (2008-12-04)
Re: New assembly language instructions to support OO languages? tmk@netvision.net.il (Michael Tiomkin) (2008-12-04)
Re: New assembly language instructions to support OO languages? cg@graysage.com (Chris Gray) (2008-12-04)
Re: New assembly language instructions to support OO languages? gah@ugcs.caltech.edu (Glen Herrmannsfeldt) (2008-12-04)
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Re: New assembly language instructions to support OO languages? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2008-12-05)
Re: New assembly language instructions to support OO languages? jasen@xnet.co.nz (Jasen Betts) (2008-12-05)
Re: New assembly language instructions to support OO languages? tony@my.net (Tony) (2008-12-05)
Re: New assembly language instructions to support OO languages? tony@my.net (Tony) (2008-12-05)
Re: New assembly language instructions to support OO languages? nmm1@cam.ac.uk (2008-12-05)
[30 later articles]
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From: Glen Herrmannsfeldt <gah@ugcs.caltech.edu>
Newsgroups: comp.compilers,comp.arch
Date: Thu, 04 Dec 2008 18:29:38 -0700
Organization: Aioe.org NNTP Server
References: 08-12-014 08-12-016
Keywords: architecture, history, OOP
Posted-Date: 05 Dec 2008 10:13:55 EST

bert wrote:
(snip)


> I don't know about new ones, but how about resurrecting some old ones?
> At least two different computers of the 1960's had an 'indirect' bit
> at the high end of an address word, meaning that it pointed to another
> word containing an address. In its turn, that might have the high bit
> set, etcetera. An instruction to load a datum or an address would
> follow such a chain of indirections until it reached the
> actually-wanted item. I know this was very good for Prolog
> implementations.


> [Indirect addressing was quite common through the 1970s. The PDP-11
> and VAX had it. But I gather that it's a challenge to implement
> efficiently, and if the machine has a lot of registers, it doesn't gain
> you much. -John]


The VAX and PDP-11 had indirect addressing modes, but the PDP-10
is the one with the indirect bit that chains as described.


The PDP-10 (not counting extended addressing) uses 18 bit addresses
in 36 bit words. One of the bits not part of the address is the indirect
bit. When an indirect address is loaded, that bit is examined and,
if set, another round will be done. In other words, indirection
is recursive.


One problem is that it is possible to get infinite indirection.
The processor has a timer to stop the process if it takes too long.


This is very much against the RISC idea that all instructions
take about the same amount of time, even more than the single
indirect addressing of the PDP-11 and VAX.


For S/360, one must do the appropriate number of L (load)
instructions for the number of levels of indirection.
Code size is less important than it used to be.


-- glen
[Actually, the machine with the timer to break indirect address loops was
the GE 635. The -10 could take an interrupt each time it did an indirect
address, abandoning the instruction in progress which would restart when
the interrupt returned. This meant that an indovidual program could hang
due to address loops, but the system wouldn't. Add in chains of execute
instructions, and you could do Algol thunks in one instruction. -John]



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