Re: New assembly language instructions to support OO languages?

nmm1@cam.ac.uk
Fri, 5 Dec 2008 15:37:33 +0000 (GMT)

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Re: New assembly language instructions to support OO languages? DrDiettrich1@aol.com (Hans-Peter Diettrich) (2008-12-05)
Re: New assembly language instructions to support OO languages? jasen@xnet.co.nz (Jasen Betts) (2008-12-05)
Re: New assembly language instructions to support OO languages? tony@my.net (Tony) (2008-12-05)
Re: New assembly language instructions to support OO languages? tony@my.net (Tony) (2008-12-05)
Re: New assembly language instructions to support OO languages? nmm1@cam.ac.uk (2008-12-05)
Re: New assembly language instructions to support OO languages? lkrupp@pssw.com (Louis Krupp) (2008-12-05)
Re: New assembly language instructions to support OO languages? nmm1@cam.ac.uk (2008-12-05)
Re: New assembly language instructions to support OO languages? walter@bytecraft.com (Walter Banks) (2008-12-05)
Re: New assembly language instructions to support OO languages? David.Schroth@unisys.com (David W Schroth) (2008-12-05)
Re: New assembly language instructions to support OO languages? gah@ugcs.caltech.edu (Glen Herrmannsfeldt) (2008-12-05)
Re: New assembly language instructions to support OO languages? gah@ugcs.caltech.edu (Glen Herrmannsfeldt) (2008-12-05)
Re: New assembly language instructions to support OO languages? georgeps@xmission.com (GPS) (2008-12-05)
Re: New assembly language instructions to support OO languages? gah@ugcs.caltech.edu (Glen Herrmannsfeldt) (2008-12-06)
[22 later articles]
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From: nmm1@cam.ac.uk
Newsgroups: comp.compilers,comp.arch
Date: Fri, 5 Dec 2008 15:37:33 +0000 (GMT)
Organization: University of Cambridge
References: 08-12-014 08-12-016 08-12-019
Keywords: architecture, history, OOP
Posted-Date: 05 Dec 2008 10:52:12 EST

Glen Herrmannsfeldt <gah@ugcs.caltech.edu> wrote:
>
>The PDP-10 (not counting extended addressing) uses 18 bit addresses
>in 36 bit words. One of the bits not part of the address is the indirect
>bit. When an indirect address is loaded, that bit is examined and,
>if set, another round will be done. In other words, indirection
>is recursive.
>
>One problem is that it is possible to get infinite indirection.
>The processor has a timer to stop the process if it takes too long.
>
>This is very much against the RISC idea that all instructions
>take about the same amount of time, even more than the single
>indirect addressing of the PDP-11 and VAX.


Yes. That particular dogma lasted for quite a long time after it was
shown to be a total fantasy but - hey! - rationality and sanity are
just words :-)


The reason that it was always nonsense is that instructions have NEVER
taken about the same amount of time, except in the minds of "computer
scientists" (of the sort that knew nothing about computing, and were
not scientists). Back in the early days, and more recently with IEEE
denormalised numbers, some floating-point operations were a LOT more
expensive than most others. For the past 20-30 years, ones involving
memory accesses have been a LOT more expensive than ones not involving
them.


Of course, that doesn't support allowing infinite recursion in such
indexing. But it would be trivial to add a field to the instruction
format to specify the indirection depth - and that's only one of many
possible solutions, as was the one used on the PDP-10.


But, as several of us have said, it is doubtful that it is worth the
bother. As you say, code size isn't typically important, almost all
code is generated by compilers, and indirect indexing is trivial to
code generate. Why not keep the ISA simple?


Regards,
Nick Maclaren.


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