Re: Register allocation

russell kym horsell <kym@sdf.lonestar.org> writes:
>Kamal R. Prasad <kamalp@acm.org> wrote:
>[...]
>> The overhead is 1-load and 1-store, but the overhead isn't as high as
>> you would expect, thanks to a hierarchy of caches to speed things up.
>> No doubt the speed with which a register can be accessed is much
>[...]
>
>Measure it, and you'll get a shock. On 5 yo architecture there seems
>to be virtually no diff between memory access and registers for common
>stuff.


It depends very much on the microarchitecture. On most of them
register allocation pays off very well. For some older results of a
micro-benchmark see
http://www.google.at/groups?q=g:thl2855960747d&dq=&hl=nl&lr=&ie=UTF-8&selm=8j7hp4%242e7%241%40news.tuwien.ac.at


For some more recent results for an application, see
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=8092>6


Executive summary of the latter: For one application (Gforth), using
explicit register allocation in addition to the gcc -O2 register
allocator gives speedups by a factor of 2-5 on an Athlon 1200 (and
similar on a Pentium III) and does not have a big effect on the
Pentium 4.


- anton
--
M. Anton Ertl
anton@mips.complang.tuwien.ac.at
http://www.complang.tuwien.ac.at/anton/home.html

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