Re: Compiler for VLIW Architecture

Jens Kilian <Jens_Kilian@agilent.com>
4 May 2000 17:15:45 -0400

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Re: Compiler for VLIW Architecture Jens_Kilian@agilent.com (Jens Kilian) (2000-05-04)
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From: Jens Kilian <Jens_Kilian@agilent.com>
Newsgroups: comp.compilers
Date: 4 May 2000 17:15:45 -0400
Organization: Agilent Technologies Deutschland GmbH
References: 00-04-016 00-04-080 00-04-113
Keywords: architecture, parallel

Gerd Bleher <gerdb@bstde006.bbn.hp.com> writes:
> > First, HP has had a VLIW RISC device out for a while, PA-RISC, I
> > think..
>
> Not really, even though an instructions like
> shift-,-add-and-conditionally-nullify-next-instruction might have the
> air of VLIW at a first glance ;-)


HP's VLIW architecture is called "EPIC"; the technology is described in this
technical report:


http://www.hpl.hp.com/techreports/1999/HPL-1999-111.html


HTH,
Jens.
--
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