From: | preston@tera.com (Preston Briggs) |
Newsgroups: | comp.compilers,comp.arch |
Date: | 11 Apr 1996 23:36:11 -0400 |
Organization: | /etc/organization |
References: | 96-04-013 96-04-059 |
Keywords: | architecture, performance |
>> Is it possible to create a computer where the HLL gets compiled into
>> processor microcode, fully optimized, with some amazing increase in
>> speed?
>Not only is it possibly, but we did that [back when]
All these answers I've been reading are missing the point. The
original poster wants an amazing increase in speed. It's not going to
happen these days. Microcode was generally made obsolete by the
invention of the separate instruction cache. For general-purpose
machines, compiling into microcode was always a problem because of the
need to handle context switches. For special-purpose machines (e.g.,
the Culler), people could do a nice job for certain tight loops. But
those loops are just the ones that respond so well to instruction
caches. In cases where an instruction cache isn't adequate, the
compiler isn't going to be able to help much anyway.
For amazing increases in speed, you need to worry about the data, not
the instructions.
Preston Briggs
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