Compile HLL to microcode on VLIW - possible?

The recent LONG thread in comp.complers on the relative merits of
using a HLL (FORTRAN, C, etc.) verses assembly language got me
wondering -


Is it possible to create a computer where the HLL gets compiled into
processor microcode, fully optimized, with some amazing increase in
speed?


Stream of consciousness analysis -


1) Compiler technology has now advanced to the point where complex
optimizations such as "these consecutive lines of code don't share any
variables so they can be done in parallel" are possible. In fact,
this is has long been done in some highly parallel processor
architectures, but they never took it down to the microcode level.


2) Microcode programs are usually (always?) embedded in a PROM area of
the processor, but that area could probably be switched to RAM and
reloaded with code as needed. ( as a side comment, does *anybody* use
hardwired logic in their processors anymore, or is it all microcode?)


3) VLIW architectures allow for "lots" of parallelism, but is it *really*
exploited?


4) I know there has been research on this general topics for years,
including some Burroughs machines in the mid-1970's that allowed you
to redefine the assembly language and even architectures (Iowa State's
SYMBOL) that directly interpreted a HLL.


Thoughts?
--
Scott A. Berg
[The idea of VLIW is indeed to give the effect of compiling to horizontal
microcode. My friends at Multiflow said that their optimizer worked pretty
well. -John]
--

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