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| Supporting byte-addressability on word-addressed hardware lehotsky@tiac.net (1995-06-27) |
| Re: Supporting byte-addressability on word-addressed hardware simmons@bnr.ca (steve (s.s.) simmons) (1995-06-28) |
| Re: Supporting byte-addressability on word-addressed hardware markt@harlequin.co.uk (1995-07-04) |
| Re: Supporting byte-addressability on word-addressed hardware pardo@cs.washington.edu (1995-07-05) |
| Re: Supporting byte-addressability on word-addressed hardware bob@tera.com (1995-07-06) |
| Re: Supporting byte-addressability on word-addressed hardware mfx@cs.tu-berlin.de (1995-07-06) |
| Re: Supporting byte-addressability on word-addressed hardware tl@ae.chalmers.se (1995-07-12) |
| Re: Supporting byte-addressability on word-addressed hardware pardo@cs.washington.edu (1995-07-19) |
| Re: Supporting byte-addressability on word-addressed hardware meissner@cygnus.com (Michael Meissner) (1995-07-20) |
| Newsgroups: | gnu.gcc.help,comp.compilers |
| From: | bob@tera.com (Bob Alverson) |
| Keywords: | GCC, architecture, code |
| Organization: | Tera Computer Company, Seattle, WA |
| References: | 95-06-081 95-07-049 |
| Date: | Thu, 6 Jul 1995 04:09:55 GMT |
The other possibility is to keep the byte bits at the top end of the pointer.
That is, a normal byte address would be rotated right 2 or 3 bits (32 or 64
bit words) to get the goofy byte pointer. The nice thing is that it looks
like a word pointer now. An unaligned reference becomes a pointer into
hyperspace. Of course, your byte load and store code will have to twiddle
bits a little more, but those are the breaks.
Bob
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