Related articles |
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MIPSco -- compiler technology patents? mark@hubcap.clemson.edu (1991-09-04) |
Re: MIPSco -- compiler technology patents? pardo@gar.cs.washington.edu (1991-09-07) |
Re: MIPSco -- compiler technology patents? henry@zoo.toronto.edu (1991-09-08) |
Newsgroups: | comp.compilers |
From: | mark@hubcap.clemson.edu (Mark Smotherman) |
Keywords: | question |
Organization: | Compilers Central |
Date: | Wed, 4 Sep 91 12:00:57 -0400 |
I noticed at the end of Suneel Jain's SIGPLAN '91 paper, "Circular scheduling:
A new technique to perform software pipelining," the following notice:
"A patent application has been filed by MIPS Computer Systems, Inc.
on some of the algorithms descirbed in this paper."
I have several questions based on this:
1) Does MIPSco currently hold a number of compiler technology patents?
2) Is there a (new?) MIPSco corporate strategy to move as much of their
compiler technology as possible under patent protection?
3) Is there a place in the design effort where patent infringement risk
analysis is done? For example, are hardware designers and compiler
writers given a list of patented devices/algorithms that they must
avoid using?
4) When a new patent is issued to a competitor on an independently-
discovered technique but the competitor happened to file first (and
there being no prior art), is the offending design ripped out? Is
the design reengineered to differ enough to escape infringement? Is
licensing undertaken? Or, do you wait for the competitor to search
for infringements? (Can you answer this in public? :-) )
5) What is the relationship of a patented algorithm to research? Can
grad students hack on the algorithm to investigate and improve? At
what point must you license the algorithm?
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