Related articles |
---|
Compiling for DSP chips tatge@m2.csc.ti.com (1990-09-07) |
Re: Compiling for DSP chips kuusama@news.funet.fi.tut.fi (1990-09-11) |
Re: Compiling for DSP chips avi@taux01.nsc.com (1990-09-24) |
Re: Compiling for DSP chips pardo@cs.washington.edu (1990-09-26) |
Re: Compiling for DSP chips seanf@sco.COM (Sean Fagan) (1990-09-30) |
Re: Compiling for DSP chips pardo@cs.washington.edu (1990-10-02) |
Newsgroups: | comp.compilers |
From: | pardo@cs.washington.edu (David Keppel) |
Keywords: | C, optimize, DSP |
Organization: | University of Washington, Computer Science, Seattle |
References: | <9009071606.AA22759@m2.csc.ti.com> <1990Sep11.075042.937@funet.fi> <4751@taux01.nsc.com> |
Date: | 26 Sep 90 23:13:03 GMT |
In article <4751@taux01.nsc.com> avi@taux01.nsc.com (Avi Bloch) writes:
>[Compiler that optimizes for special instructions.]
The moderator writes:
>[GCC lets you in-line assembler, frequently hidden inside macros, that is
>often used to get to features like sin and cos instructions. -John]
In particular, you can tell GCC that certain hard registers are
clobbered, so GCC can perform register allocation around those
instructions. If the machine description knows about those
instructions, then I think that it is also possible to define
optimizations over those instructions, even if the compiler itself
doesn't ``know'' how to emit them.
;-D on ( A compile of things to do ) Pardo
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pardo@cs.washington.edu
{rutgers,cornell,ucsd,ubc-cs,tektronix}!uw-beaver!june!pardo
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