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| Related articles |
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| Nop insertion shreyas76@gmail.com (shrey) (2009-10-27) |
| Re: Nop insertion n.pipenbrinck@cubic.org (Nils) (2009-10-28) |
| Re: Nop insertion cr88192@hotmail.com (BGB / cr88192) (2009-10-28) |
| Re: Nop insertion walter@bytecraft.com (Walter Banks) (2009-10-28) |
| Re: Nop insertion cfc@shell01.TheWorld.com (Chris F Clark) (2009-10-28) |
| Re: Nop insertion gneuner2@comcast.net (George Neuner) (2009-10-29) |
| Re: Nop insertion pertti.kellomaki@tut.fi (Pertti Kellomaki) (2009-10-29) |
| From: | Pertti Kellomaki <pertti.kellomaki@tut.fi> |
| Newsgroups: | comp.compilers |
| Date: | Thu, 29 Oct 2009 13:08:40 +0200 |
| Organization: | Compilers Central |
| References: | 09-10-032 |
| Keywords: | architecture |
| Posted-Date: | 30 Oct 2009 11:55:04 EDT |
shrey wrote:
> Are there inorder architectures that need precise number of nops
> inserted between operations. If so, how does a compiler guarantee
> that ? I am especially thinking of producers and consumers in faraway
> basic blocks.
The Transport Triggered Architecture (TTA) is one, see
<http://en.wikipedia.org/wiki/Transport_triggered_architecture>.
TTA processors are statically scheduled, so the compiler determines at
compilation time the timing of when operands are written to functional
units and when the results are read. To do this, the compiler of
course needs to have detailed information about the latencies of
operations, pipelines, etc.
For producers and consumers in different basic blocks the problem is
indeed a bit trickier, but it is still basically a data flow
problem. If there is an upper bound as well as lower bound, the
problem is even harder, but I suppose optimization techniques like
Interger Linear Programming should be applicable.
> Any pointers to any exiting work?
Google for "static scheduling" and you should find plenty.
--
Pertti
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