Re: Modeling the condition code register in register allocation

"Roland Lei_a" <roland.leissa@googlemail.com> wrote in message
news:09-01-012@comp.compilers...
> Hello everyone,
>
> I am currently writing a small compiler as a hobby project. My
> register allocator is basicly working but I have no idea how I could
> model the condition code register (rflags) properly. AMD64 is my
> current backend. My intermediate representation (SSA based) handles
> comparisons and conditional jumps like this at the moment:
>
> a = b + c
> d = a > 10
> IF d GOTO label1 ELSE GOTO label2
> label2
> ...
> label1
> ...


Not quite sure what this represents; perhaps your original source is
something like:


a=b+c
if a>10 then ... else ...


And your intermediate representation is as above?


I don't know if my suggestion is going to be that useful, but when I did
this, I made an expression such as this:


  a>10


/when used in the context of a conditional expression/, yield a new type
that I called 'Cond' rather than an integer or bool. Such a Cond value was
implicity stored in a special machine register, and had a condition code
attached to it (one of the 16 x86 codes). A ">" operator would have the
condition code G or A (depending on signed/unsigned).


In my compiler, when I processed an expression, there was usually some
operation to be applied to the result. In the case of a conditional
expression such as inside If...Then, this was JumpTrue or JumpFalse, which
tested whether the prior condition code was true or not. So the result of
compiling:


if a > 10 then
  e:=f


might be:


Load R,(a)
Cmp R,10 ;or Cmp (a),10
JumpF G,L1 ;becomes jle L1 in x86
Load R,(f)
Store (e),R
L1:


(My method didn't work too well on 'If a Then'; I needed to apply a
conversion from 'a' (an int) to type Cond, which might result in Cmp (a),0).


> Some ideas or related papers?


Oh, you want to do it properly? :-)


--
Bartc

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