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| Related articles |
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| Software Pipelining plfriko@yahoo.de (Tim Frink) (2008-08-26) |
| Re:Software Pipelining Jatin_Bhateja@mentor.com (Jatin Bhateja) (2008-08-28) |
| Re:Software Pipelining plfriko@yahoo.de (Tim Frink) (2008-08-28) |
| Re: Software Pipelining pertti.kellomaki@tut.fi (Pertti Kellomaki) (2008-08-29) |
| Re: Software Pipelining mr.neeraj@gmail.com (Neeraj Goel) (2008-09-02) |
| Re: Software Pipelining sidtouati@inria.fr (Touati Sid) (2008-09-08) |
| Re: Software Pipelining kamalpr@hp.com (kamal) (2008-09-10) |
| Re: Software Pipelining johnhull2008@gmail.com (johnhull2008) (2008-09-11) |
| Re: Software Pipelining plfriko@yahoo.de (Tim Frink) (2008-09-16) |
| [6 later articles] |
| From: | Tim Frink <plfriko@yahoo.de> |
| Newsgroups: | comp.compilers |
| Date: | 28 Aug 2008 20:51:35 GMT |
| Organization: | Compilers Central |
| References: | 08-08-072 08-08-086 |
| Keywords: | optimize |
| Posted-Date: | 28 Aug 2008 17:36:05 EDT |
On Thu, 28 Aug 2008 11:49:49 +0530, Jatin Bhateja wrote:
> It's a combination of loop unrolling and instruction scheduling. e.g
Thank you, but I know how software pipelining is working. :-)
My question was if also a significant performance increase for RISC
architectures with a restricted number of functional units can be
expected when software pipelining is applied.
And if profiling might be exploited here.
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