Related articles |
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Pitfalls in interference graph ? shafitvm@gmail.com (Mohamed Shafi) (2007-09-28) |
Re: Pitfalls in interference graph ? SidTouati@inria.fr (ST) (2007-10-01) |
Re: Pitfalls in interference graph ? torbenm@app-1.diku.dk (2007-10-01) |
Re: Pitfalls in interference graph ? johnl@iecc.com (2007-10-01) |
Re: Pitfalls in interference graph ? bergner@vnet.ibm.com (Peter Bergner) (2007-10-01) |
Re: Pitfalls in interference graph ? marcov@stack.nl (Marco van de Voort) (2007-10-01) |
Re: Pitfalls in interference graph ? rayiner@gmail.com (Rayiner Hashem) (2007-10-01) |
Re: Pitfalls in interference graph ? rayiner@gmail.com (Rayiner Hashem) (2007-10-01) |
Re: Pitfalls in interference graph ? jeremy.wright@microfocus.com (Jeremy Wright) (2007-10-02) |
Re: Pitfalls in interference graph ? shafitvm@gmail.com (shafi) (2007-10-15) |
Re: Pitfalls in interference graph ? torbenm@app-6.diku.dk (2007-10-17) |
Re: Pitfalls in interference graph ? SidTouati@inria.fr (ST) (2007-10-18) |
[3 later articles] |
From: | Marco van de Voort <marcov@stack.nl> |
Newsgroups: | comp.compilers |
Date: | Mon, 1 Oct 2007 19:21:54 +0000 (UTC) |
Organization: | Stack Usenet News Service |
References: | 07-09-104 07-10-007 07-10-010 |
Keywords: | registers, optimize |
Posted-Date: | 02 Oct 2007 00:43:40 EDT |
On 2007-10-01, John L <johnl@iecc.com> wrote:
> To preferentially assign a virtual register to a specific machine
> register, rewrite the instruction to use the real register, and
> prepend a copy virtual -> real / append a copy real -> virtual. If the
> virtual register can safely be assigned to that real register, the
> coalescing phase will do this and eliminate the copy. This works for
> call parameters, call results, and ops that only take a specific
> register.
How do you specify an affinity that is not 100% necessary? Like older i386
arch CPU's having a preference for EBX as index register ?
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