Re: Pitfalls in interference graph ?

johnl@iecc.com (John L)
Mon, 1 Oct 2007 15:46:45 +0100

          From comp.compilers

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Pitfalls in interference graph ? shafitvm@gmail.com (Mohamed Shafi) (2007-09-28)
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Re: Pitfalls in interference graph ? jeremy.wright@microfocus.com (Jeremy Wright) (2007-10-02)
Re: Pitfalls in interference graph ? shafitvm@gmail.com (shafi) (2007-10-15)
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From: johnl@iecc.com (John L)
Newsgroups: comp.compilers
Date: Mon, 1 Oct 2007 15:46:45 +0100
Organization: Compilers Central
References: 07-09-104 07-10-007
Keywords: optimize, registers
Posted-Date: 01 Oct 2007 12:07:37 EDT

Chaitin, in his original algorithm for register allocation by graph
colouring showed that all these issues are solvable.


To preferentially assign a virtual register to a specific machine
register, rewrite the instruction to use the real register, and
prepend a copy virtual -> real / append a copy real -> virtual. If the
virtual register can safely be assigned to that real register, the
coalescing phase will do this and eliminate the copy. This works for
call parameters, call results, and ops that only take a specific
register.


Where some but not all register can be used - eg r0 cannot be used a
an address base of PowerPC or 390, then mark all virtual registers
that are address bases as interferring with those registers.


A call instruction must cause all volatile (caller-saves) registers to
interfere will all virtual register live at the call point.


FPR vs GPR is an interesting issue. Muchnick, in "Advanced Compiler
Design and Implementation" recommends combining FPR and GPR
allocation. There are cases, such as copying large well aligned blocks
of memory, where one can use an FPR or GPR. Cooper, Harvey, and
Torczon (all from Rice, as Preston Briggs) in "How to Build an
Interference Graph" prefer to treat them separately.


Jeremy Wright


From: (Torben Fgidius Mogensen) <torbenm@app-1.diku.dk>
Sent: 01/10/2007 10:41:39
Subject: Re: Pitfalls in interference graph ?


"Mohamed Shafi" <shafitvm@gmail.com> writes:


> Hello all,
>
> I am trying to implement Briggs Optimistic register allocator after
> reading the the thesis written by Preston Briggs.
>
> Now for building the interference graph what other than register pairs
> is there any other issues that one has to look out for?


  - Calling conventions, i.e., caller-saves versus callee-saves
      registers, parameter-transfer registers and registers used for
      return address and stack/frame pointer.


  - Special-purpose registers, such as multiplication using specific
      registers for arguments and results.


  - Register types such as address/integer/FP registers.


Torben




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