Re: How about VLIW used as RISC?

Stan Lass <stanlass@netins.net>
2 May 2004 21:59:41 -0400

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Re: How about VLIW used as RISC? stanlass@netins.net (Stan Lass) (2004-05-02)
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| List of all articles for this month |
From: Stan Lass <stanlass@netins.net>
Newsgroups: comp.compilers
Date: 2 May 2004 21:59:41 -0400
Organization: netINS InterNetNews site
References: 04-04-088 04-04-106
Keywords: architecture
Posted-Date: 02 May 2004 21:59:41 EDT

Torben Ęgidius Mogensen wrote:
[snip]
>
> An approach using a JIT compiler that collects profiling information
> before compiling could work. This way, you can use an intermediate
> form that has little or no scheduling information and let the JIT
> compiler schedule for the actual VLIW parameters and profile. If you
> regularly reprofile and recompile code, you can reschedule a program
> while it runs. I believe the Transmeta processors use something like
> this internally.
>
> Torben


Along these lines, please see
http://showcase.netins.net/web/stanlass/futrarch.htm
for some conjecture on how computer architecture will evolve.


Regards, Stan

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