Related articles |
---|
How about VLIW used as RISC? ronald@interqos.com (2004-04-28) |
Re: How about VLIW used as RISC? nmm1@cus.cam.ac.uk (2004-04-29) |
Re: How about VLIW used as RISC? ricardo.b@zmail.pt (Ricardo Bugalho) (2004-04-29) |
Re: How about VLIW used as RISC? torbenm@diku.dk (2004-04-29) |
Re: How about VLIW used as RISC? MitchAlsup@aol.com (2004-04-29) |
Re: How about VLIW used as RISC? alexc@std.com (Alex Colvin) (2004-05-02) |
Re: How about VLIW used as RISC? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2004-05-02) |
Re: How about VLIW used as RISC? stanlass@netins.net (Stan Lass) (2004-05-02) |
Re: How about VLIW used as RISC? sander@haldjas.folklore.ee (Sander Vesik) (2004-05-08) |
[2 later articles] |
From: | Ricardo Bugalho <ricardo.b@zmail.pt> |
Newsgroups: | comp.arch,comp.compilers |
Date: | 29 Apr 2004 12:05:22 -0400 |
Organization: | Netvisao, A sua Internet por Cabo |
References: | 04-04-088 |
Keywords: | architecture |
Posted-Date: | 29 Apr 2004 12:05:22 EDT |
On Wed, 28 Apr 2004 15:33:26 -0400, Ron wrote:
> So what is your opinion?
VLIW is only interesting if you want to build a one way (one instruction
word) in-order CPU. Anything else, plain old RISC is simpler.
--
Ricardo
Return to the
comp.compilers page.
Search the
comp.compilers archives again.