Related articles |
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dynamic bintrans jrydberg@night.trouble.net (Johan Rydberg) (2003-11-21) |
Re: dynamic bintrans toby@telegraphics.com.au (2003-12-03) |
Re: dynamic bintrans brown@cs.bris.ac.uk (Julian Brown) (2003-12-03) |
Re: dynamic bintrans toby@telegraphics.com.au (2003-12-03) |
Re: dynamic bintrans j.troeger@qut.edu.au (Jens Troeger) (2003-12-13) |
Re: dynamic bintrans j.troeger@qut.edu.au (Jens Troeger) (2003-12-13) |
From: | Julian Brown <brown@cs.bris.ac.uk> |
Newsgroups: | comp.compilers |
Date: | 3 Dec 2003 20:22:32 -0500 |
Organization: | University of Bristol |
References: | 03-11-080 |
Keywords: | translator |
Posted-Date: | 03 Dec 2003 20:22:31 EST |
On 2003-11-21, Johan Rydberg <jrydberg@night.trouble.net> wrote:
> I'm interested in dynamic binary translation. I've done some small
> tests of my own, and they work pretty good. Now I want to make the
> compiler retargetable. For this, I have to choose an IR that can
> describe targets which has specific characteristics (such as delay
> slots, condition codes (x86), condition insns (arm, ia-64), ..).
>
> Standard RTL, such as used by GCC, seems to be too generic to
> describe for example the condition codes on x86. It also has
> troubles describing conditional insns.
>
> Anyone that has any ideas, or can give me some pointers to papers
> regarding this topic?
It is a rather difficult thing to do. I can't pretend to have made a
serious attempt at it, but some guys on a Yahoo list I'm on are doing so
right at the moment. You might try looking at:
http://groups.yahoo.com/group/dynarec/
I'm sure you'd be welcome to join!
I have tried designing an IR for an ARM->x86 dynarec, but I'm not
entirely happy with it and it's not really that portable. See:
http://armphetamine.sourceforge.net/pheta2.html
if you're interested.
Cheers,
Julian
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