Related articles |
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x86 code generation nicks@3drealms.com (Nick Shaffner) (2000-06-14) |
Re: x86 code generation mlross@jf.intel.com (2000-06-20) |
Re: x86 code generation jkahrs@castor.atlas.de (Juergen Kahrs) (2000-06-20) |
Re: x86 code generation napi@col31.mimos.my (2000-06-20) |
From: | Juergen Kahrs <jkahrs@castor.atlas.de> |
Newsgroups: | comp.compilers |
Date: | 20 Jun 2000 02:32:06 -0400 |
Organization: | STN Atlas Elektronik GmbH SLE1 |
References: | 00-06-057 |
Keywords: | 386, code |
Nick Shaffner wrote:
> I am interested x86 specific code generation, including
> intermediete representations that are friendly to the architecture,
> strategies for managing the floating point stack, dealing with the
> lack of registers - but making use of register renaming, etc.
The code generator of the LCC compiler may be just another general
purpose code generator and therefore not so interesting for you. But
the book has separate chapters for each code generator and the x86 is
one of them:
http://www.cs.princeton.edu/software/lcc/
> [I've seen thick manuals from Intel full of advice on x86 code
> generation. You can probably find PDFs on their developer web
> site. -John]
Yes, you are right, John. These links are just starting point:
http://developer.intel.com/drg/mmx/manuals/
http://www.amd.com/products/cpg/athlon/techdocs/index.html
Currently, it looks like 3DNow! is an interesting instruction set
extension. 3DNow allows for executing 4 single precision floats with
one instruction. It is supported by AMD and Cyrix/VIA.
BTW: The architectures of the new Intel processors (IA64 and
Willamette) are so extremely dependent on well designed/adapted code
generators that (good) compiler writers should face a "bright
future". Furthermore, the Alpha architecture and some IBM POWER
processors go into hardware supported multithreading, which also needs
support by compiler designers.
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