|Using extra outputs of an instruction firstname.lastname@example.org (Dobes Vandermeer) (2002-03-09)|
|Re: Using extra outputs of an instruction email@example.com (2002-03-11)|
|Re: Using extra outputs of an instruction firstname.lastname@example.org (2002-03-17)|
|Re: Using extra outputs of an instruction email@example.com (Michael Meissner) (2002-03-21)|
|Re: Using extra outputs of an instruction firstname.lastname@example.org (David Chase) (2002-03-22)|
|Re: Using extra outputs of an instruction email@example.com (Bo Persson) (2002-03-24)|
|From:||David Chase <firstname.lastname@example.org>|
|Date:||22 Mar 2002 21:18:44 -0500|
|Organization:||The World : www.TheWorld.com : Since 1989|
|Posted-Date:||22 Mar 2002 21:18:44 EST|
Michael Meissner wrote:
> However, things like SSA really want a single output.
I think you have to fiddle with it, but otherwise it works well
enough. I am not 100% sure of the last details w/o looking at our
source code, but I think we just indexed the outputs. Exchange really
is a special case here, because the operation ties together two moves,
without mingling their values -- that is, one input could be loop
invariant, the other not, but you cannot hoist "half of" an exchange
operation. For (e.g.) division, for most properties, both results
depend on both inputs, so they hoist together, are constant together,
Understand, of course, that my first choice is to work with a single
output and peephole/pattern-match the special cases at the end,
because that is simpler.
> [The XCHG instruction only locks the bus if it has a LOCK prefix, but it's
> slow anyway. -John]
Careful -- some architectures, the exchange-with-memory operation (not
sure how it is spelled, since it is an assembler mnemnonic anyway)
does implicitly lock the bus. Pentium is one example of this.
CMPXCHG (Pentium-speak for Compare-and-swap) does not, and does
require a prefix.
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