Re: Processor specific optimisations

rickh@capaccess.org (Rick Hohensee)
18 Jan 2002 21:09:20 -0500

          From comp.compilers

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From: rickh@capaccess.org (Rick Hohensee)
Newsgroups: comp.compilers
Date: 18 Jan 2002 21:09:20 -0500
Organization: http://groups.google.com/
References: 02-01-077
Keywords: optimize
Posted-Date: 18 Jan 2002 21:09:20 EST

It doesn't look hopeless. As a counter-example, getting good code out
of C for a Forth-like stack machine is a steep uphill battle.


C favors a PDP-11-like design. ++ and -- are post-indexed addressing,
which the PDPs had, apparently. The 386 for another counter-example
does that sort of thing very differently.


The 6502 _IS_ a PDP-11-like design. The design goal of the 6502 was to
have as many of the addressing modes of the PDP-11 as possible in 8
bits. That's promising. What you probably need is an intermediate code
and a smart converter for that intermediate code to the 6502. BCPL
"cells" might be illustrative.


Rick Hohensee
rickh@capaccess.org


> So, the question finaly is: Is it possible to apply the modern
> compiler optimisation strategies to this old processor and have a
> result that an experimented 6502 assembly coder would have a hard time
> to beat ?


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