Compiler positions available for week ending October 17

compilers@iecc.com (comp.compilers)
18 Oct 1999 00:26:17 -0400

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| List of all articles for this month |
From: compilers@iecc.com (comp.compilers)
Newsgroups: comp.compilers,misc.jobs.offered
Date: 18 Oct 1999 00:26:17 -0400
Organization: Compilers Central
Keywords: jobs

This is a digest of ``help wanted'' and ``position available'' messages
received at comp.compilers during the preceding week. Messages must
advertise a position having something to do with compilers and must also
conform to the guidelines periodically posted in misc.jobs.offered.
Positions that remain open may be re-advertised once a month. To respond
to a job offer, send mail to the author of the message. To submit a
message, mail it to compilers@iecc.com.




-------------------------------


From: Christopher Glaeser <cdg@nullstone.com>
Subject: Compiler Job Listings
Date: 12 Oct 1999 16:01:19 PDT
Organization: Nullstone Corporation


Compiler job openings at Stage2 Innovations, BSquare, Hewlett Packard,
Microsoft, Silicon Graphics, Diab SDS, Synopsys, Conexant Systems, Sun
Microsystems, Motorola, Apple Computer, Compaq, and dozens of other
companies are listed with CompilerJobs.com at
http://www.compilerjobs.com/


Best,
Christopher Glaeser




-------------------------------


From: Cheng-Hsueh Andrew Hsieh <java4ada@yahoo.com>
Subject: Job Opportunities @ Intel MRL
Date: Wed, 13 Oct 1999 16:34:10 -0700
Organization: Intel Corporation
X-Status:


                                                Job Opportunities


                                              Research Positions
                                                            at
                                    Microprocessor Research Lab
                                                    Intel Corp.
                                        Santa Clara, California




Job Description




The compiler and dynamic optimization research group at the
Microprocessor Research Lab (MRL) at Intel currently has several
openings for research positions. MRL conducts research in advanced
technology areas of platforms, micro-architectures, compilers, dynamic
optimization, graphics, and processor design.


The compiler and dynamic optimization research group at MRL is
exploring the boundaries and interfaces between microprocessor,
compiler, and operating system in pursuit of new directions in
computing including ILP (instruction level parallelism) compiler
technology, dynamic compilation, and multi-threading. This group
studies and invents advanced software optimization technology to
achieve high-performance computing. The group also works with
architecture teams to investigate and innovate techniques across the
boundaries between hardware and software for the future
micro-architecture features for Intel architecture, especially for
IA-64 to deliver high degrees of performance, throughput, reliability,
scalability, compatibility, and power efficiency.


We seek creative, risk-taking, yet focused candidates with a strong
background in compiler technology, dynamic optimization, processor
architecture, or performance analysis. The candidates must be
self-motivated and good team players. They must enjoy working in an
applied research environment. They are expected to interact with
product development groups to seek inputs and to transfer
technologies.


Any candidate interested in any of the following or related fields is
encouraged to apply:


- instruction-level parallelism
- cache and memory optimizations
- dynamic optimizations
- hardware and software collaborative optimizations
- multi-threading
- program analysis
- performance analysis of various commercial and emerging workloads




Minimum Qualifications


Ph.D. in CS/EE or a related field.


The candidates must have excellent communication skills to interact
with universities and other research groups and to publish research
results in conferences and journals.




Intel provides competitive compensation and full employee benefits. Intel
Corp. is an equal opportunity company.




Please contact
Jesse Z. Fang
email: jesse.z.fang@intel.com
fax: (408)653-8511




-------------------------------


Date: Sat, 16 Oct 1999 17:08:45 -0700 (PDT)
From: Sassan Hazeghi <sassan@cup.hp.com>
Subject: Compiler Development Position with the HP ANSI C++ Team


Our team is responsible for the development of the C++ compilers for
HP's current (PA) and upcoming (IA64) platforms and we are currently
looking for a _strong_ compiler engineer with good understanding of
the C++ language + its runtime to join us in delivering compilers that
help define the conformance and performance standards for C++.


The areas that we are focusing on include "correct and efficient"
implementation of the full breadth of the C++ language, C++-specific
optimizations, design and tuning of the C++ ABI/runtime and
performance characterization, analysis and tuning of large, real
world, C++ applications.


This is an opportunity to work with a strong team in what we consider
to be a fun environment and to help develope and refine a technology
and product that matters; C++ is the dominant development language for
large ("industrial grade") apps and we hope to deliver the tools that
will make a positive difference in the daily working of the
programming community at large.


If you are interested, we would like to hear from you ! Please send a
copy of your resume to <sassan@cup.hp.com>


Thanks,
Sassan Hazeghi


Email: sassan@cup.hp.com
Voice: +1-408-447-5007


WWW: http://www.hp.com/go/hpc++


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