Strength Reduction for Sparc v8 and others

  Hello everybody ,


I have 2 questions to submit :


1) Does anyone knows where to get some informations on how GCC does
strength reduction for MUL/DIV operations, when multiplying/dividing
by a constant ?


I found an algorithm that performs the same reductions as GCC in the
better cases, (I mean low constant as Reg *5, Reg * 54,...) but
unfortunately, in the worse cases, GCC has twice less instructions
than me.


(Worse cases => Reg * or / 0x1010101010101010...1010 that leads to ~10
instructions for GCC and ~20 for me)


2) Where can I get extensive information on Sparc and how instructions
works
      (i.e. : Delay Slot, stalling of registers in some op., ...)
  Can anyone help ?
  --
  Manuel
[SPARC International sells manuals on-line at http://www.sparc.com. I
have the V8 book which defines the architecture but is deliberately
vague about implementation details since there are multiple implementations
of the V8 architecture. -John]

Return to the comp.compilers page.
Search the comp.compilers archives again.