Announcing a SimpleScalar tutorial with Micro-30

In conjunction with MICRO-30, we are pleased to announce a tutorial on
the internals of the SimpleScalar microprocessor simulation tool
suite. The tutorial will be held before the 30th Annual International
Symposium on Microarchitecture (MICRO-30), in the conference hotel.


The tutorial will be held on Sunday, November 30, from 2:00-6:00 pm.
Registration is free, but preference will be given to those who have
registered for the conference. Directions to the hotel and
registration information for the conference can be obtained on the
main conference page: "http://www.ece.ncsu.edu/micro30/index.html".
More information about the tutorial is available on the web page:
"http://www.cs.wisc.edu/~mscalar/ss/tutorial.html".


We are targeting the tutorial primarily at architecture researchers
who have no more than a working familiarity with the tools (i.e.,
researchers who understand the simulator code thoroughly may not find
the tutorial as useful as do other participants). The content of the
tutorial will be as follows:


- Tool set overview
- Simulator internals
- Performance optimizations
- Compiler modifications
- Memory hierarchy extensions


We also plan to make prereleases of the memory hierarchy and
shared-memory multiprocessor extensions (planned for inclusion in
release 3.0 of the tools) available to tutorial participants, when
they become available.


Participation in the tutorial will be limited to the first forty
registrants on a first-come, first-serve basis. To register, please
fill out the form available at:


http://www.cs.wisc.edu/~mscalar/ss/register.html


If you have any questions, please send e-mail to the tutorial
organizers (dburger@cs.wisc.edu, taustin@ichips.intel.com). We hope
to see you there!


Sincerely,


Todd Austin Doug Burger
Microcomputer Research Labs Computer Sciences Dept.
Intel Corporation University of Wisconsin-Madison
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