CFP Micro-30

                                                C A L L F O R P A P E R S


                                                              M I C R O - 3 0




                                                    THE 30th ANNUAL IEEE/ACM


                                                      INTERNATIONAL SYMPOSIUM


                                                          ON MICROARCHITECTURE


                                                      with special emphasis on
                                        Instruction-Level Parallel Processing


                                                      Sheraton Imperial Hotel
                                      Research Triangle Park, North Carolina
                                                        December 1 - 3, 1997


                                                                Sponsored by
                                                IEEE TC-MICRO and ACM SIGMICRO


                                              http://www.ece.ncsu.edu/micro30/


                                                              Important Dates:
            SUBMISSION: JUNE 20; Acceptance: AUG. 24; Final version: SEP. 26
____________________________________________________________________________
For the last three decades, MICRO has served as the premier forum for
discussion of microarchitecture, instruction-level parallelism, and compiler
technology. The 30th International Symposium on Microarchitecture will
continue this tradition by focusing on new techniques to extract high levels
of instruction-level parallelism via hardware and software. The goals of
this symposium are to bring together researchers in fields related to
microarchitecture and instruction-level parallelism, to encourage technical
interaction, and to advance the state of the art of high-performance
microarchitectures and fine-grain parallel processing. Papers are solicited
in fields including the following:


      * Microarchitecture innovation, VLIW, superscalar, multiscalar,
                  multithreaded, etc.
      * Compiler techniques for instruction-level parallelism: software
                  pipelining, global scheduling, register allocation, memory
                  disambiguation, etc.
      * Object code translation techniques
      * Branch prediction hardware and software
      * Theoretical foundations of instruction level parallelism
      * Compiler/hardware techniques for improving memory system performance
      * Application of instruction-level parallelism techniques to Design
                  Automation
      * Parallel algorithms for fine grain parallel architectures


THE DEADLINE FOR SUBMISSIONS IS JUNE 20, 1997. Please submit one electronic
copy of the paper in postscript format. There is no page limit, but the
paper must not exceeding 5000 words in length. For submission instructions,
please visit http://www.ece.ncsu.edu/micro30/. Notification of acceptance
will occur by August 24, 1997. The camera ready copy of the accepted papers
will be due on September 26, 1997. In order to guarantee the success of your
electronic submissions please make sure that your postscript submission can
be previewed via the ghostview tool. Contact conte@eos.ncsu.edu or
alexe@eos.ncsu.edu with any questions.


GENERAL CHAIR
        Mark Smotherman
        Clemson University
        Box 341906
        Dept. of Computer Science
        Clemson SC 29634-1906
        (864) 656-5878
        (864) 656-0145 FAX
        mark@cs.clemson.edu


PROGRAM CHAIR
        Tom Conte
        NC State University
        Dept. of ECE, Box 7911
        Raleigh, NC 27695-7911
        (919) 515-5067
        (919) 515-5523 FAX
        conte@eos.ncsu.edu


PUBLICATIONS CHAIR
        Alexandre Eichenberger, NC State University


REGISTRATION CHAIR
        Manoj Franklin, Clemson University


LOCAL ARRANGEMENTS CHAIR
        Catherine Conte


STEERING COMMITTEE
        CO-CHAIRS:
                James Bondi, Texas Instruments
                Matthew Farrens, UC Davis
        MEMBERS:
                Richard Belgard, Consultant
                Stan Habib, CUNY
                Wen-mei Hwu, University of Illinois
                Gearold Johnson, NTU
                Yale Patt, University of Michigan
                Andrew Wolfe, Princeton


PROGRAM COMMITTEE
        Steve Beaty, Hewlett-Packard
        Richard Belgard, Consultant
        Bob Colwell, Intel
        Ed Davidson, University of Michigan
        Jim Dehnert, Silicon Graphics
        Kemal Ebcioglu, IBM Watson
        Joel Emer, DEC
        Matthew Farrens, UC Davis
        Stefan Freudenberger, Hewlett-Packard
        Guang Gao, University of Delaware
        Dirk Grunwald, University of Colorado
        Wen-mei Hwu, University of Illinois
        Scott Mahlke, Hewlett-Packard
        Bill Mangione-Smith, UCLA
        Steve Melvin, Zytek
        Trevor Mudge, University of Michigan
        Yale Patt, University of Michigan
        Mike Schlansker, Hewlett-Packard
        John Shen, CMU
        Jim Smith, University of Wisconsin
        Mike Smith, Harvard
        Guri Sohi, University of Wisconsin
        Ian Spillinger, Intel
        Gary Tyson, University of Michigan
        Nancy Warter-Perez, Cal. State LA
        Andrew Wolfe, Princeton
        Tse-Yu Yeh, Intel


--
Mark Smotherman, Computer Science Dept., Clemson University, Clemson, SC
http://www.cs.clemson.edu/~mark/homepage.html
--

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