Related articles |
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MOVE operation scheduling meleis@ece.neu.edu (1996-11-01) |
Re: MOVE operation scheduling blume@dynamic.cs.princeton.edu (1996-11-03) |
From: | blume@dynamic.cs.princeton.edu (Matthias Blume) |
Newsgroups: | comp.compilers |
Date: | 3 Nov 1996 00:25:25 -0500 |
Organization: | Princeton University, Department of Computer Science |
References: | 96-11-017 |
Keywords: | architecture, optimize |
meleis@ece.neu.edu (Waleed Meleis) writes:
Hi, I'm looking for references that address the problem of scheduling move
operations to minimize spill traffic in a compiler. These operations would
allow data values to move from one register to another. Both optimal and
heuristic approaches would be interesting. Thanks.
Iterated Register Coalescing. Lal George and Andrew W. Appel. ACM
Transactions on Programming Languages and Systems 18(3) 300-324, May
1996. ges, January 1996.
--
-Matthias
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