Compiler positions available for week ending August 4

This is a digest of ``help wanted'' and ``position available'' messages
received at comp.compilers during the preceding week. Messages must
advertise a position having something to do with compilers and must also
conform to the guidelines periodically posted in misc.jobs.offered.
Positions that remain open may be re-advertised once a month. To respond
to a job offer, send mail to the author of the message. To submit a
message, mail it to compilers@iecc.com.




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Date: Tue, 30 Jul 1996 09:21:14 -0500 (CDT)
From: Romel Rivera <romel@xinotech.COM>
Subject: Position Available at Xinotech, Minneapolis




Xinotech Research is seeking compiler-oriented professionals in Computer
Science with BS, MS or PhD, to assis with the design and development of a
plan-based, metalanguage-driven, interactive reengineering environment
that supports automatic program transformation. See us at
http://www.xinotech.com/recruiting for further information.


Romel Rivera, | home page: http://www.xinotech.com/
Director of Research, | e-mail: romel@xinotech.com
Xinotech Research, | information: info@xinotech.com
Technology Ctr, Suite 213 | phone: (612) 379-3844
1313 5th Street S.E., | fax: (612) 379-3833
Minneapolis, MN 55414,USA |




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Subject: jobs offered at Synopsys in CA
Date: Tue, 30 Jul 96 19:35:55 -0700
From: Srinivas Raghvendra <srini@synopsys.com>


We are looking for a bright software engineer that wants to
participate in the design and development of leading-edge
tools for ASIC/FPGA designers. This is the ideal position for
a person that wants to learn new skills, contribute ideas,
grow quickly and take on responsibility.


The position is in a small, focussed team that is creating the
next generation of RTL synthesis tools, tools that help ASIC
and FPGA designers design aggressive, complex circuits using
high level languages such as Verilog and VHDL.


The engineer will use his/her experience in compilers, C/C++
programming, and design of large software systems to research
languages and design compilers. Experience in VLSI design
will be helpful as will be a good understanding of issues
in ASIC/FPGA design. Educational requirements are a MS or
Ph.D in CS/EE. Positions are available for fresh graduates
and engineers with experience.


Please send resumes by email to srini@synopsys.com or by
fax to 415-965-8637, attention Srini Raghvendra. By US mail,
send resumes to:
Srini Raghvendra
700 E. Middlefield Ave
Mountain View, CA 94043. USA.


For reasons of brevity I have left out information about Synopsys.
Please see www.synopsys.com for details.




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