Generating code for 8-bit RISC ?

vladimir@azure-tech.com (Vladimir Novikov)
8 May 1996 00:30:03 -0400

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Generating code for 8-bit RISC ? vladimir@azure-tech.com (1996-05-08)
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From: vladimir@azure-tech.com (Vladimir Novikov)
Newsgroups: comp.compilers
Date: 8 May 1996 00:30:03 -0400
Organization: Azure Technologies, Inc.
Keywords: architecture, lcc, question

I am trying to retarget the lcc for 8-bit RISC processor with Harvard
arcitecture DP8344-BCP. This processor has very few only 8-bit
instructions and 8 bit registers. It has separate memory for
instructions and data . It has no floating point processor, so
floating point operations are performed by subroutines. Maybe
somebody knows a backend for such or similar processors ( at least for
8-bit processor) that could serve as a template for me? Any advice
will be very appreciated. Thanks.


My e-mail is
vladimir@azure-tech.com
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