Re: Compile HLL to microcode on VLIW - possible?

In article 96-05-010 ok@cs.rmit.edu.au (Richard A.
O'Keefe) writes:


> The Burroughs microcoded machines (the "D-machines") were the
> B1700/B1800/... series. That's SEVENTEEN hundred. The memory was
> supposedly bit addressable; programming language implementations could
> choose the word length they preferred. The "User Programming
> Language" implementation chose 24 bits.


[All the following is from fading memory, so accuracy not guaranteed.]


The UPL choice was because the underlying ALU & memory subsystem were
both 24 bits wide, even though the memory was logically bit
addressable. Using "words" not aligned on 24 bit boundaries required
at least 2 memory cycles, although the memory interface would do the
work for you. Using words bigger than 24 bits required the microcode
to handle the parts.


The ALU had an interesting way of working that I've not seen anywhere
else except in MOVE based MISCs. It had two input registers, A and B,
and a set of output registers which simultaneously gave combinations
of the inputs something like A+B, A-B, B-A, A | B, A & B, A xor B, -A
and NOT A. When I first saw this I thought it a pretty neat hack, but
I've never come across any practical use for having all those
combinations available, except for the "butterflies" in Walsh
transforms which need A+B and A-B.


> [The B1700 was the machine I characterized in a previous note as running
> as though affixed to a gastropod. -John]


This may have had a lot to do with the fact that on a context switch
it paged its microcode from a relatively slow (for the time) main
memory. In these days of multimegabyte L1 cache and few nanosecond
clocks, it would be interesting to know what a modern equivalent would
be like. However, ISTR that the B1700 was touted as "closing the
semantic gap", and it strikes me that our understanding of compiling
high level languages to simple hardware is orders of magnitude better
than then. (Phew, actually managed to mention compilers :-)
--
[I'd think that the modern equivalent would be to compile each program to its
own custom vertical microcode. This is arguably the same as compiling for
your favorite RISC chip. -John]
--

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