Re: Compilers for ultra-compact byte code?

koopman@cs.cmu.edu (Phil Koopman)
13 Feb 1996 00:03:58 -0500

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From: koopman@cs.cmu.edu (Phil Koopman)
Newsgroups: comp.compilers
Date: 13 Feb 1996 00:03:58 -0500
Organization: Carnegie Mellon University, EDRC
References: 96-02-096
Keywords: C, forth



On 9 Feb 1996 17:13:38 -0500, Paul Rubin posted to comp.compilers:
>To my slight surprise (maybe not to anyone else's), I've
>found that compiled FORTH and similar formats use more space than
>native machine code would on these machines. This is partly because
>the microcontrollers have many single byte instructions (vs. two-byte
>FORTH words),...


There's no reason you can't have a Forth with byte tokens instead of
16-bit tokens (been done more than once -- you use a jump table to
resolve addresses). For compactness, say you'd allocate frequent
operations to 128 byte codes, and use the top bit to flag 8-bit lookup
table address vs. 16-bit jump address.


I played with the code size issue a while back, and found that an
optimizing C to Forth compiler produced code that was more or less the
same size as a CISC instruction set (e.g., 80x86) on small programs
(this assumed a byte-coded Forth hardware CPU, but didn't count for
the assembly language to implement Forth primitives on some other
machine).


I think that the reputation for code compactness in Forth comes from
the heavy reuse of code fragments composed by an experienced
programmer, not from the language or threading mechanism in and of
itself. For example, if you have definitions of 100+ words instead of
the recommended 7 +/- 2, you're not going to see compaction in Forth.
My intuition that the compactness gets better with bigger programs
(which won't help much on a tiny application). I've not been able to
figure out how to automate this for a compiler, but if anyone has
leads on how that might be done, I'm interested.


Phil Koopman -- koopman@cs.cmu.edu -- http://www.cs.cmu.edu/~koopman
--


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