Related articles |
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Compiler optimization of division and remainder hbaker@netcom.com (1996-01-27) |
Re: Compiler optimization of division and remainder d.sand@ix.netcom.com (1996-01-27) |
Re: Compiler optimization of division and remainder augustss@cs.chalmers.se (1996-01-27) |
Re: Compiler optimization of division and remainder richard@atheist.tamu.edu (1996-01-28) |
Re: Compiler optimization of division and remainder prener@watson.ibm.com (1996-01-29) |
Re: Compiler optimization of division and remainder hbaker@netcom.com (1996-01-29) |
Re: Compiler optimization of division and remainder Peter-Lawrence.Montgomery@cwi.nl (1996-01-29) |
Re: Compiler optimization of division and remainder johnmce@world.std.com (1996-01-29) |
[4 later articles] |
From: | d.sand@ix.netcom.com (Duane Sand) |
Newsgroups: | comp.compilers |
Date: | 27 Jan 1996 16:00:47 -0500 |
Organization: | Netcom |
References: | 96-01-088 |
Keywords: | optimize |
hbaker@netcom.com (Henry G. Baker) writes:
>On another newsgroup, a poster claimed that some compilers could
>optimize a program which used both a/b and a%b (both quotient and
>remainder with the _same_ arguments) [to use a single division;
>does anyone know of a compiler that actually does that?]
The Mips/SiliconGraphics UCODE compilers do this. It's implemented as
a hack in their assembler, which also does the expansion of certain
multiplications into shift&adds, and other kinds of expansions of
virtual opcodes into sequences of real opcodes. Plus scheduling and a
tiny amount of duplicate code removal. The assembler combines the two
operations only if prior compiler passes have not moved them to
separate basic blocks.
Perhaps one reason why this compiler does the /% optimization while
many others do not, is that the Mips iset does not contain a
traditional 2-argument-reg, 1-result-reg single instruction for doing
an entire integer divide, or an entire modulo. These are handled by
explicit moves to/from specialized registers, with the expectation
that the compiler would find useful integer work to statically
schedule into the multiplier/divider unit's long latency. In
contrast, other architectures have either expressed the total
operation (with result reg#) in one instruction, or called millicode
routines containing multiply-step or divide-step loops, or used
floatint-point unit resources that don't like doing remainders.
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