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Instruction scheduling rajeevc@mipos2.intel.com (1989-06-27) |
Instruction Scheduling bron@bronze.wpd.sgi.com (1989-07-05) |
Re: instruction scheduling budd@bu-it.BU.EDU (1989-07-11) |
Instruction Scheduling horst@techfak.uni-bielefeld.de (1991-06-11) |
Instruction Scheduling nandu@jupiter.cs.clemson.edu (1993-03-31) |
Instruction Scheduling onufryk@eden.rutgers.edu (1995-04-18) |
instruction scheduling kagha@po-box.mcgill.ca (Khurram Z. Agha) (1999-11-28) |
Re: instruction scheduling ast@halcyon.com (Andrew Tucker) (1999-12-01) |
Newsgroups: | comp.arch,comp.compilers |
From: | onufryk@eden.rutgers.edu (Peter Onufryk) |
Keywords: | parallel, optimize, architecture, VLIW |
Organization: | Rutgers University |
Date: | Tue, 18 Apr 1995 05:12:28 GMT |
I am looking for information on the state-of-the-art in instruction
scheduling and machine dependent optimizations (e.g., scheduling for ILP
on VLIW or superscalar processor, boosting, etc...). Any pointers,
references or comments would be greatly appreciated.
Peter Onufryk
onufryk@eden.rutgers.edu
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