Register allocation for 8-bit processors?

I will shortly be starting work on a register allocator for 8-bit
processors. I intend to use a variant of graph colouring. I have
identified some problems and found some plausible solutions to these,
but wonder if anyone knows of any papers that discuss the following
problems:


    1) Values larger than 8 bits (16 and 32 bits are needed in my case)
          will be stored using a block of 2 or 4 registers, in some cases
          required to be aligned at 2 or 4 register borders. My current
          idea is to assign a size to each variable in the conflict graph
          and require a similar number of colours. If graph colouring
          succeeds, this is not in itself enough to ensure register
          allocation, as there might not be enough adjacent registers
          available. My solution is to try to keep the free registers in as
          large blocks as possible, and do spilling (and recolouring) if I
          don't have the required number of adjacent colours available.


    2) Most 8-bit processors are two-address, meaning that the first
          operand must be in the same register as the result. The register
          allocator should try to allocate the same register to these to
          avoid extra register transfers, and it should avoid having the
          second operand in the same register as the result (unless the
          operation is commutative), as that would require two transfers
          and an extra register. I plan to do this by introducing
          preferencing, both positive and negative weights on being in the
          same register as another variable. This is also used for
          prefering to be in a particular register (e.g. accumulators).


While I think these ideas would work, I would be interested in seeing
what solutions other people have used.


Torben Mogensen (torbenm@diku.dk)
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