CFP - 28th Annual International Symposium on Microarchitecture

This document, a postscript version of this document (both color and
bw), and other Conference information is available on the World Wide Web at
http://american.cs.ucdavis.edu/Micro28/homepage.html, and via anonymous ftp from
american.cs.ucdavis.edu:/Micro28.


If you would like to receive a hard-copy version of this announcement,
please e-mail your name and address to micro28@cs.udavis.edu and we will get
one in the post to you ASAP.


______________________________________________________________________________


                                                C A L L F O R P A P E R S


                                                              M I C R O - 2 8




                                                    THE 28th ANNUAL IEEE/ACM


                                                      INTERNATIONAL SYMPOSIUM


                                                          ON MICROARCHITECTURE


                                                      with special emphasis on
                                        Instruction-Level Parallel Processing


                                                          Ann Arbor, Michigan
                                                November 29 - December 1, 1995


                                                                Sponsored by
                                                IEEE TC-MICRO and ACM SIGMICRO


                                                              Important Dates:
            SUBMISSION: JUNE 13; Acceptance: AUG. 15; Final version: SEP. 12
______________________________________________________________________________


The Microarchitecture Symposia have become a premier forum in recent
years, combining high quality research in fields that include instruction
level parallelism, compilers and architectures. In the quest for increased
performance, industry and academia have been focusing more on ILP, and
new techniques are being developed to extract higher levels of
parallelism with ILP compilers and architectures. Instruction level
parallelism has become an intense area of research. The goals of this
conference are to bring together researchers in fields related to
instruction level parallelism, to encourage interaction, and to further
the state of the art in microarchitectures and fine grain parallel
processing. Papers are solicited in fields including (but not limited to)
the following:


        Compiler techniques for instruction level parallelism
            (Software pipelining, global scheduling, register allocation,
            memory disambiguation, novel optimizations)
        Theoretical foundations of instruction level parallelism
        ILP architectures and designs (VLIW, superscalar, multiscalar, ...)
        Object code translation
        Branch prediction hardware and software
        Compiler and hardware techniques for improving memory system performance
        Application of ILP techniques to Design Automation
        Parallel algorithms for fine grain parallel architectures
        Multithreading systems (including data flow)
        Experience with fine grain parallel architectures




THE DEADLINE FOR SUBMISSIONS IS JUNE 13, 1995. Please submit one
electronic copy of a paper (in postscript format) not longer than 5000
words to the PROGRAM CHAIR at kemal@watson.ibm.com. The postscript file
should be appended to the Micro-28 paper submission form, which can be
obtained by sending e-mail to micro28@cs.ucdavis.edu or from the ftp/WWW
site listed at the beginning of this document. Notification of acceptance
will occur by August 15, 1995. The camera ready copy of the accepted
papers will be due on September 12, 1995. In order to minimize problems
with your electronic submissions please ensure your postscript submission
can be previewed by ghostview. Contact the program chair if you need any
help with the electronic submission procedure.


GENERAL CHAIR
        Trevor Mudge
        Department of EECS
        The University of Michigan
        1301 Beal Avenue
        Ann Arbor, Michigan 48109-2122
        e-mail: tnm@eecs.umich.edu
        phone: (313) 764-0203
        FAX: (313) 763-4617


PROGRAM CHAIR
        Kemal Ebcioglu
        IBM T.J. Watson Research Center
        P.O. Box 704
        Yorktown Heights, NY 10598
        e-mail: kemal@watson.ibm.com
        phone: (914) 784-6188
        FAX: (914) 784-6306


PUBLICITY CHAIR
        Matthew Farrens, UC Davis


STEERING COMMITTEE
        Richard Belgard, Consultant
        Jim Bondi, Texas Instruments
        Matthew Farrens, UC Davis
        Wen-mei Hwu, Illinois
        Gearold Johnson, Nat'l Technol. U.
        Hans Mulder, Intel Corp.
        Yale Patt, Michigan
        Andrew Wolfe, Princeton


PROGRAM COMMITTEE
        Vicki Allan, Utah State
        Richard Belgard, Consultant
        David Bernstein, IBM Haifa (Israel)
        Jim Bondi, Texas Instruments
        Bob Colwell, Intel Corp.
        Henk Corporaal, Delft U. (Netherlands)
        Jim Dehnert, Silicon Graphics
        Josh Fisher, HP Labs
        Mike Flynn, Stanford
        Guang Gao, McGill U. (Canada)
        Jean-Luc Gaudiot, USC
        Rajiv Gupta, Pittsburgh
        Stanley Habib, CUNY
        Martin Hopkins, IBM T.J. Watson
        Wen-mei Hwu, Illinois
        Monica Lam, Stanford
        Bill Mangione-Smith, Motorola
        Steve Melvin, Consultant
        Jaime Moreno, IBM T.J. Watson
        Alex Nicolau, UC Irvine
        Yale Patt, Michigan
        Bob Rau, HP Labs
        Vivek Sarkar, IBM Software Solutions
        John Shen, Carnegie-Mellon
        Gabriel Silberman, IBM T.J. Watson
        Jim Smith, Wisconsin
        Mike Smith, Harvard
        Mary Lou Soffa, Pittsburgh
        Andrew Wolfe, Princeton
--

Return to the comp.compilers page.
Search the comp.compilers archives again.