Call for Paper: Parallel Architectures and Compilation Tech. 95

                                                        CALL FOR PAPERS


                                                                PACT'95
International Conference on Parallel Architectures and Compilation Techniques
                                        June 27-29, 1995, Limassol, Cyprus


                    Sponsored by the IFIP WG 10.3 (Concurrent Systems), ACM SIGARCH,
                                          and IEEE TC on Computer Architecture.




CONFERENCE OBJECTIVES


There are enormous opportunities for parallelism in future generation
high-performance computer systems. Facing the challenge of exploiting
such parallelism, a simple "instruction set" as a binding contract
between architects and compiler writers may no longer be enough. Based
on the success and enthusiastic feedback received from the first
working conference held in Orlando, Florida in January 1993, as well
as the second PACT (Montreal, Canada, August 1994), the purpose of
this working conference is to provide an open forum for the parallel
architecture and compiler research communities to discuss and debate
key issues of common interest and see how parallelism can be enhanced
and exploited more efficiently in a joint effort. Also we aim at
bringing together researchers with interest in both conventional and
non-conventional approaches (e.g., data-flow, multithreading, etc.) to
foster communication. Papers are solicited which contain significant
novel ideas and research results. Conference topics include (but are
not limited to):


              o Novel computation models for fine and medium grain parallelism
              o Architectures and compilers for medium grain parallelism
              o Architectures and compilers for fine grain parallelism
              o Compiler / hardware techniques for exploitation of fine-grain
                  parallelism in massively parallel machines
              o Major projects in data-driven and multithreaded machines,
                  and other competing novel approaches to parallelism
              o Exploitation of fine grain and medium grain parallelism in
                  application-specific architectures using data-flow,
                  multithreaded or related approaches.




INFORMATION FOR AUTHORS


Authors should submit 5 copies of a 20 page double-spaced manuscript
to the following address before January 10, 1995. Authors will be
notified of final decision before March 10, 1995. All accepted papers
will appear in the conference proceedings.


          PACT 95
          Dept. of Electrical Engineering - Systems
          3740 McClintock Ave. (EEB 308)
          University of Southern California
          Los Angeles, CA 90089-2563
          (213)740-4484, (213)740-4449 (FAX)
          pact95@enee.usc.edu




IMPORTANT DATES
o Papers due: January 10, 1995
o Acceptance notification: March 10, 1995




NOTE: The International Symposium on Computer Architecture will take
place in Santa Margherita Ligure, Italy, June 22-24, 1995 (just before
PACT'95). The International Conference on Supercomputing will take
place immediately after PACT'95 in Barcelona, Spain, July 3-7,
1995. Special air fares are being negotiated to allow participants to
attend all meetings.




GENERAL CHAIRS
Lubomir Bic, University of California, Irvine
Paraskevas Evripidou, University of Cyprus


PUBLICITY CHAIRS
Andrew Sohn, New Jersey Institute Technology
Mike Reeve, European Commission, Belgium
Mitsuhisa Sato, Electrotechnical Lab., Japan
Avi Mendelson, Technion, Israel


LOCAL ARRANGEMENTS CHAIR: George Samaras, University of Cyprus


PUBLICATIONS CHAIR: Wim Bohm, Colorado State University


FINANCE CHAIR: Walid Najjar, Colorado State University


TUTORIAL CHAIR: Herbert Hum, Concordia University, Canada


PROGRAM COMMITTEE CHAIR: Jean-Luc Gaudiot, Univ. of Southern California


PROGRAM COMMITTEE
D. Abramson, Griffith University, Australia
D. Agrawal, North Carolina State University
M. Amamiya, Kyushu University, Japan
L. Bic, University of California, Irvine
W. Bohm, Colorado State University
D. DeGroot, Texas Instrument
K. Ebcioglu,IBM T.J. Watson Research Center
G. Egan, Swinburne University, Australia
J. Feo, Lawrence Livermore National Lab.
U. Finger, ENST, France
G. Gao, McGill University, Canada
C. Girault, Paris VI, France
D. Harper, University of Texas, Dallas
I. Koren, University of Massachusetts
B. Lecussan, ONERA-Sup' Aero, France
J. McGraw, Lawrence Livermore National Lab.
A. Nicolau, University of California, Irvine
M. O'Keefe, University of Minnesota
Y. Patt, University of Michigan
R. Perrott, Queen University, UK
C. Polychronopoulos, Univ. of Illinois, UC
M. Reeve, DG III - F, EC, Belgium
S. Sakai, ETL & RWCP, Japan
B. Shirazi, University of Texas, Arlington
G. Silberman, IBM T.J. Watson Research Ctr.
T. Sterling, USRA CESDIS
E. Swartzlander, University of Texas, Austin
H. Terada, Osaka University, Japan
A. Wendelborn, Adelaide University, Australia
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