Related articles |
---|
barrier synchronization yschen@ee.ntu.edu.tw (1994-11-16) |
Re: barrier synchronization newburn@aslan.ece.cmu.edu (1994-11-18) |
Re: barrier synchronization rrogers@cs.washington.edu (1994-11-18) |
Newsgroups: | comp.compilers |
From: | newburn@aslan.ece.cmu.edu (Chris Newburn) |
Keywords: | parallel |
Organization: | Electrical and Computer Engineering, Carnegie Mellon. |
References: | 94-11-114 |
Date: | Fri, 18 Nov 1994 03:11:58 GMT |
Yeong-Sheng Chen <yschen@ee.ntu.edu.tw> wrote:
> Does anyone know that which machine (or what kind of architecture)
>can efficiently execute the following codes with barrier synchronizations.
>(For example, machines with VLIW architecture, or others?)
The mechanisms in XIMD architecture are suitable for that purpose. See the
first paper in ASPLOS IV, by Wolfe and Shen. Gupta and others have proposed
other barrier mechanisms that are helpful as well.
--
Chris J. Newburn newburn@ece.cmu.edu
Department of Electrical and Computer Engineering, Carnegie Mellon University
--
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