Re: Optimizing assembler for SPARC

Xavier Leroy <Xavier.Leroy@inria.fr> wrote:
> Is there an "optimizing" assembler for the SPARC? I'm looking for
> something which will perform instruction scheduling and delay-slot
> filling on arbitrary assembler programs, in the style of the Mips and
> Alpha assemblers.
>
> (As has been noted in this newsgroup before, the -O option of SunOS
> assembler is not a general-purpose scheduler; it produces wrong code
> from the output of my code generator.)


Beware: the MIPS assembler has similar problems. It assumes that the
so-called temporary registers ($t0-$t9) are never live across procedure
calls. So for example, the following code:


beq $t0, $0, L1
jal bar
addi $t0, $t0, 1
...


L1: li $t0, 42
...


Is scheduled as follows:


beq $t0, $0, L1
li $t0, 42
jal bar
nop
addi $t0, $t0, 1
...


L1: ...


This is an incredible annoyance for interprocedural register allocators
that do not use a fixed caller/callee-save calling convention (e.g.
Steenkiste and Hennessy's).


Is there a way to defeat this behavior (other than .set nomove)? Are
there any "general purpose" MIPS schedulers out there?
--
Mark Leone <mleone@cs.cmu.edu>
School of Computer Science, Carnegie Mellon University
Pittsburgh, PA 15213 USA
--

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