Related articles |
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[Q] PowerPC compilation questions. napi@cs.indiana.edu (Mohd Hanafiah Abdullah) (1994-07-08) |
Re: [Q] PowerPC compilation questions. mayoff@austin.ibm.com (1994-07-09) |
Re: [Q] PowerPC compilation questions. joe@sanskrit.ho.att.com (1994-07-11) |
Re: [Q] PowerPC compilation questions. patteeuw@etcv01.eld.ford.com (1994-07-12) |
Re: [Q] PowerPC compilation questions. zstern@adobe.com (1994-07-18) |
Re: [Q] PowerPC compilation questions. ssimmons@convex.com (1994-07-29) |
Newsgroups: | comp.compilers |
From: | joe@sanskrit.ho.att.com (Joe Orost) |
Keywords: | IBM, linker |
Organization: | AT&T |
References: | 94-07-048 |
Date: | Mon, 11 Jul 1994 19:56:48 GMT |
"Mohd Hanafiah Abdullah" <napi@cs.indiana.edu> writes:
>I need to know how the ACTIVATION RECORD produced by a compiler that follows
>the PowerPC specs looks like. Also, which registers are used for the STACK
>POINTER and FRAME POINTER? Finally, does the stack grow from low address to
>high address, or is it otherwise? Thanks.
Refer to the IBM Assembler Language Reference manual SC23-2197-01.
It is for POWER, but POWER PC is the same.
Here is the quick answer:
R1 Stack Pointer: Stack grows down (from high to low)
R2 TOC pointer
R3-R11 Argument registers
R12 scratch
R13-R31 preserved across calls
There is no frame pointer register.
regards,
joe
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Full Name: Joseph M. Orost
EMail: joe@babel.ho.att.com, attmail!orost
Organization: AT&T Bell Laboratories: FlashPort Services
SurfaceMail: 943 Holmdel Rd.; Cruz Plaza; Holmdel, NJ 07733
Phone: +1 (908) 946-1115
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