Re: Target machine for compiler course

Mike.Spivey@comlab.oxford.ac.uk (Mike Spivey) writes:
|> It might be nice to generate code for the SPARCstations that my
|> students will use for their practicals. But isn't generating code for
|> RISC machines with register windows, delay slots, etc. too much for a
|> first detailed look?


In our course the students generate code for the MIPS architecture. There
are no register windows and the delay slots are hidden by the assembler.
However, even if the delay slots were visible, I would have no qualms
presenting the machine to the students. It's easy to generate a nop after
every load or branch, if they want to take the easy way.


- anton
--
M. Anton Ertl
anton@mips.complang.tuwien.ac.at
--

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