Re: Caller/Callee saved Registers

pardo@cs.washington.edu (David Keppel) writes:
>That is, the callee branches to the `nargs-instruction' of the caller, but
>the callee branch is followed by a delay slot instruction that branches
>back to the callee, so only a single caller instruction is executed.
                                                ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^


(The Xerox Alto microcode had some of this same bizarre behavior, and was
strictly pipelined, so that a sequence of 3 tests would have you quickly
pulling your hair out trying to figure out exactly which instructions
would be executed under what conditions. It was fairly simple to compile
for, however, using a kind of backwards 'dynamic programming' technique.)


Why does this remind me so much of the 7090 & 360 'execute' instructions?
When I first saw them, I thought "what a curious thing, but what are they
good for?" They're kinda like indirect addressing for the instruction
stream. The only good use I ever saw for the 7090 version was a
table-driven emulation of a PDP-10 style byte extraction instruction. I
believe that there's an article from the early 1960's (CACM???) which
attempts to convince us of their utility. It's interesting to see them
pop up in this new context.
[They were popular in the 1960s, and the PDP-6 and 10 had them. I sometimes
found them useful as switches, and they were very handy for handling Algol
thunks, but I can't say I miss them terribly. On the 360 they were typically
used in stylized ways to fake variable length string instructions. -John]
--

Return to the comp.compilers page.
Search the comp.compilers archives again.