TRAPB placement (Re: Alpha and IEEE exceptions)

mark@hubcap.clemson.edu (Mark Smotherman)
Thu, 13 Jan 1994 14:30:10 GMT

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TRAPB placement (Re: Alpha and IEEE exceptions) mark@hubcap.clemson.edu (1994-01-13)
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Newsgroups: comp.arch,comp.compilers
From: mark@hubcap.clemson.edu (Mark Smotherman)
Keywords: arithmetic, architecture
Organization: Clemson University
References: <CIv3yn.DMM@sunspot.nosc.mil> <1994Jan12.204929.756@csrd.uiuc.edu>
Date: Thu, 13 Jan 1994 14:30:10 GMT

grout@sp17.csrd.uiuc.edu (John R. Grout) writes:
[to get precise FP exceptions with reasonable performance
>Here's one possible approach... code compiled in debugging mode takes
>checkpoints every so often (doing a TRAPB, then saving intermediate results
>somewhere: DEC suggested once per basic block). If an FP exception is
>trapped, the debugger gets control, dynamically restores program status,
>builds the specific code sequence to trace the failure one FP instruction at
>a time, and executes that sequence of instructions to recreate the failure
>(this time precisely).


Are there methods to do minimum TRAPB insertion without saving register
state?


E.g.,
  - TRAPB at least once at end of each BB due to control dependencies.
  - for a given BB, divide the registers into "source" and "working", then
      generated code must not overwrite any "source" register, or there must
      be a TRAPB prior to the update of any "source" register
  - TRAPB prior to the second update of any "working" register


  - the debugger should then know how to reconstruct the original contents
      of the source registers


Is this sufficient?
--
Mark Smotherman, CS Dept., Clemson University, Clemson, SC 29634-1906
    (803) 656-5878, mark@cs.clemson.edu or mark@hubcap.clemson.edu
--


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