Pipeline details of various Sun Architectures

kelvin@kickapoo.cs.iastate.edu (Kelvin Nilsen)
Fri, 19 Nov 1993 22:18:25 GMT

          From comp.compilers

Related articles
Pipeline details of various Sun Architectures kelvin@kickapoo.cs.iastate.edu (1993-11-19)
Re: Pipeline details of various Sun Architectures chase@Think.COM (1993-11-22)
| List of all articles for this month |

Newsgroups: comp.arch,comp.sys.sun.hardware,comp.compilers
From: kelvin@kickapoo.cs.iastate.edu (Kelvin Nilsen)
Keywords: architecture, sparc, question
Organization: Iowa State University, Ames IA
Date: Fri, 19 Nov 1993 22:18:25 GMT

We're developing some portable tools to perform execution time analysis of
SPARC instruction sequences (for real-time systems). Where can we find
detailed descriptions of the pipelines on various SPARC-family processors?


(We need to know the pipeline stages and each instruction's use of
pipeline stages. Our tool is similar to the Marion retargetable
instruction scheduler. Hope this helps explain what sort of details we're
looking for.)


Thanks.
--
Kelvin Nilsen/Dept. of Computer Science/Iowa State University/Ames, IA 50011
  (515) 294-2259 kelvin@cs.iastate.edu uunet!cs.iastate.edu!kelvin
--


Post a followup to this message

Return to the comp.compilers page.
Search the comp.compilers archives again.