Re: i860 code generation

jason@convex.com (Jason L. Eckhardt) writes:
>I'm working on a code generator for the i860. Currently the code selection
>phase picks scalar floating point instructions (f* rather than pf*) for
>fp codes.
>
>I wish now to have the cg generate pipelined versions of the instructions.
>Should I do this in the code selection phase or is it better to select
>scalar instruction as I've been doing and transform these into pipelined
>versions in a later phase?


I would try to do this late in the code generation process. The i860
pipelined instructions are useful when you can combine multiple operations
to flow through the pipeline. This should not be done before optimizations
that remove or add operations are performed. Also, once you have done the
register renaming required by the pipelined operations, you have to be
very careful not to change the order of the instructions and not to move
any other FP instructions in between, e.g.


fadd f1, f2, f3
fadd f4, f5, f6
fadd f7, f8, f9


will become


(1) pfadd f1, f2, f0
(2) pfadd f4, f5, f0
(3) pfadd f7, f8, f3 ; the result f1+f2 is stored into f3
(4) pfadd f0, f0, f6 ; f6 = f4+f5
(5) pfadd f0, f0, f9 ; f9 = f7+f8


(Note: the mnemonics and the latencies may be wrong, I have not really
programmed the i860, but I have studied the architecture). The second
FP-add operation after (1) must contain the register into which the result
of f1+f2 has to be stored, so you cannot change the order of this sequence
or move other FP instructions in between. I believe having to keep this
the same through all optimizations could be a big problem. Also,
optimizations like loop unrolling, or software pipeling may expose
additional opportunities to make use of pipelined operations, so it would
make sense to transform to pipelined operations afterwards. Better yet,
you may look for a way to integrate the transformation to pipelined code
with software pipeling, as these optimizations influence each other.


I would be interested in hearing what you find.


Marc


Marc-Michael Brandis
Institute for Computer Systems
ETH-Zentrum (Swiss Federal Institute of Technology)
CH-8092 Zurich, Switzerland
email: brandis@inf.ethz.ch
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