Parallel Computing Timeline (version 4) -- LONG

The LaTeX document included below is a timeline-style history of parallel computing,
and of supercomputing more generally. It is still incomplete, and I would welcome
more information about machines of the 1960s and early 1970s, about the development
of vectorising compiler technology, and about parallel functional and logic languages.


Cheers,


Greg Wilson


_______________________________________________________________________________________




\documentstyle[bigtabular,11pt]{article}
\setlength{\parindent}{0cm}
\newcommand{\yr}[1]{\item[{#1}:]~}
\newcommand{\event}[4]{%
\item[~~]{#4}%
{\begin{small}\begin{em}({#3}: {#2}.)\end{em}\end{small}}}
\begin{document}


\begin{large}
{\sc{Introduction}}
\end{large}


\bigskip


This document is a timeline of major developments in parallel computing.
It will eventually appear as part of a textbook on parallel programming,
but might also be separately published.
All contributions and corrections are welcomed,
and should be sent to \verb`gregw@cs.anu.edu.au`.


\bigskip


\begin{large}
{\sc{Guidelines}}
\end{large}


\begin{enumerate}
\item When submitting corrections or additions,
please submit {\em{only}\/} the new material,
not an edited copy of this whole document.
\item Please include your initials in every entry you submit,
and add them to every entry you change.
\item Please remember to put each item in the keyword listing
(field \#2 of each event entry) in braces,
so that they may be extracted automatically.
\end{enumerate}


\bigskip


\begin{large}
{\sc{Contributors}}
\end{large}


The following have contributed or corrected articles;
I am particularly grateful to Michael Wolfe,
whose generous early assistance got this off the ground,
and to Eugene Miya,
who provided many useful pointers.


\bigskip


\begin{Tabular}{lll}
TA & Tamir Azaz & \verb`tamir@meiko.co.uk` \\
EAB & Edward Bertsch & \verb`eab@msc.edu` \\
BMB & Bruce Boghosian & \verb`bmb@think.com` \\
BRC & Brad Carlile & \verb`bradc@cray.com` \\
WD & Bill Dally & \verb`billd@ai.mit.edu` \\
JD & Jack Dongarra & \verb`dongarra@cs.utk.edu` \\
JF & John Feo & \verb`feo@diego.llnl.gov` \\
JMF & Jim Flemming & \verb`flemming@vino.enet.dec.com` \\
WH & Willi Hasselbring & \verb`willi@informatik.uni-essen.de` \\
RWH & Roger Hockney & \verb`rwh@pac,soton.ac.uk` \\
RJ & Rick Johnson & \verb`rickj@ssd.intel.com` \\
LSK & Larry Kaplan & \verb`lkaplan@ultra.tera.com` \\
HGK & Harwood Kolsky & \verb`harwood@cse.ucsc.edu` \\
TL & Tom Lovett & \verb`tdl@sequent.com` \\
BM & Barry Margolin & \verb`barmar@think.com` \\
LFM & Larry Meadows & \verb`lfm@pgroup.com` \\
ENM & Eugene Miya & \verb`eugene@wilbur.nas.nasa.gov` \\
YO & Yoshio Oyanagi & \verb`oyanagi@is.s.u-tokyo.ac.jp` \\
JRR & James R. Reinders & \verb`reinders@ssd.intel.com` \\
PR & Paul Repacholi & \verb`zrepachol@cc.curtin.edu.au` \\
MS & Matthias Schumann & \verb`schumann@informatik.tu-muenchen.de` \\
MCS & Markus Schwehm & \verb`schwehm@immd7.informatik.uni-erlangen.de` \\
RS & Roger Shepherd & \verb`roger@inmos.co.uk` \\
MKS & Mark Smotherman & \verb`mark@cs.clemson.edu` \\
DS & Douglas E. Solomon & \verb`doug@sgi.com` \\
HSS & Harold Stone & \verb`hstone@sunset.ee.cornell.edu` \\
PDT & Philip Tannenbaum & \verb`b47tbaum@sx.iah.nec.com` \\
PGW & Paul Whiting & \verb`pgw@mel.dit.csiro.au` \\
GVW & Greg Wilson & \verb`gvw@epcc.ed.ac.uk` \\
MW & Mike Wolfe & \verb`mwolfe@cse.ogi.edu`
\end{Tabular}


\bigskip


\begin{large}
{\sc{Timeline}}
\end{large}


\bigskip


\begin{description}


\yr{1956}
\event{1956}{{IBM}, {STRETCH}}{MW,HGK}
{IBM starts 7030 project (known as STRETCH),
with the goal of producing a machine
with 100 times the performance of the IBM 704,
initiated by Atomic Energy Commission at Los Alamos.}


\yr{1958}
\event{1958}{{Bull}, {Gamma 60}}{MKS}
{Bull of France announces the Gamma 60 with multiple function units
and fork and join operations in its instruction set; 19 are later
built.}


\yr{1959}
\event{1959}{{IBM}, {STRETCH}}{MW,HGK}
{IBM delivers first STRETCH computer.
Only seven are ever built,
but much of the techology re-surfaces in the later IBM 7090 and 7094.}


\yr{1960}
\event{1960}{{CDC}, {Cray}, {CDC 6600}}{MW}
{Control Data starts development of CDC 6600.}


\yr{1962}
\event{1962}{{Petri}, {Petri-Nets}}{WH}
{C.~A.\ Petri describes Petri Nets.}


\yr{1964}
\event{1964}{{AEC}, {CDC}, {TI}, {Illiac}}{MW}
{Atomic Energy Commission urges manufacturers to look at ``radical''
machine structures.
This leads to CDC Star-100, TI ASC, and Illiac-IV.}
\event{1964}{{CDC}, {Cray}, {CDC 6600}}{GVW}
{Control Data Corporation produces CDC~6600,
the world's first commercial supercomputer.}
\event{1964}{{Illiac-IV}}{MW}
{Air Force signs Illiac-IV contract with University of Illinois.
The project is led by Daniel Slotnick;
primary subcontractors are Burroughs and Texas Instruments.}


\yr{1965}
\event{1965}{{IBM}, {IBM~2938}, {array processor}}{HGK}
{IBM 2938 Array Processor delivered.
A programmable digital signal processor,
it proves very popular in the petroleum industry.}
\event{1965}{{GE}, {MIT}, {Bell Labs}, {Multics}, {symmetric multiprocessing}}{BM}
                {Multics project begun by GE, MIT, and AT\&T Bell Laboratory,
to develop a general-purpose shared-memory multiprocessing
timesharing system.}


\yr{1966}
\event{1966}{{Bernstein}, {compilation}, {data dependency}}{GVW}
{Bernstein introduces Bernstein's Condition
for statement independence,
which is foundation of subsequent work on data dependency analysis.}
\event{1966}{{Flynn}, {taxonomy}}{GVW}
{Flynn publishes paper describing architectural taxonomy.}


\yr{1967}
\event{1967}{{Amdahl}}{GVW}
{Amdahl publishes paper questioning feasibility of parallel processing;
his argument is later called ``Amdahl's Law''.}
\event{1967}{{IBM}, {IBM~360/91}}{MW,HGK}
{IBM produces the 360/91 (later model 95)
with dynamic instruction reordering.
20 of these were produced over the next several years;
the line was eventually replaced with the slower Model 85.}


\yr{1968}
\event{1968}{{Dijkstra}, {semaphore}}{GVW}
{Edsger Dijkstra describes semaphores.}
\event{1968}{{dataflow}, {Stanford University}}{PGW}
{Duane Adams of Stanford University coins the term ``dataflow''
while describing graphical models of computation in his Ph.D thesis.}
\event{1969}{{Honeywell}, {Multics}, {symmetric multiprocessing}}{BM}
{Honeywell delivers first Multics system
(symmetric multiprocessor with up to 8 processors).}
\event{1968}{{CDC}, {Cyberplus}}{MW}
{Group formed at Control Data to study computing needs for image
processing; this leads to AFP and Cyberplus designs.}


\yr{1969}
\event{1969}{{CDC}, {Cray}, {CDC 7600}}{GVW}
{CDC produces CDC~7600 pipelined supercomputer.}


\yr{1970}
\event{1970}{{FPS}}{GVM,BRC}
{Floating Point Systems Inc.\ founded
by former C~N~Winningstad and Tektronix employees
to manufacture floating-point co-processors for minicomputers.}
\event{1970}{{DEC}, {asymmetric multiprocessor}}{JMF}
{PDP-6/KA10 master/slave (asymmetric) multiprocessor
jointly developed by MIT and DEC.}
\event{1970}{{C.mmp}, {CMU}}{GVW}
{Development of C.mmp begins at Carnegie-Mellon.}


\yr{1971}
\event{1971}{{Dijkstra}, {dining philisophers}}{WH}
{Edsger Dijkstra poses the dining philisophers problem which is often
used to test the expressivity of new parallel languages.}
\event{1971}{{Intel}}{GVW}
{Intel produces 4004 microprocessor (world's first single-chip CPU).}
\event{1971}{{CDC}, {Cyberplus}}{MW}
{CDC delivers hardwired Cyberplus
parallel radar image processing system to Rome Air Development Center,
where it produces 250 times the performance of CDC~6600.}
\event{1971}{{TI}, {ASC}}{MW}
{Texas Instruments delivers the Advanced Scientific Computer
(also called Advanced Seismic Computer).
Seven of these machines were developed.
An aggressive automatic vectorizing Fortran compiler
was developed for this machine.}


\yr{1972}
\event{1972}{{CDC}, {CRI}}{GVW}
{Seymour Cray leaves Control Data Corporation,
founds Cray Research Inc.}
\event{1972}{{Illiac-IV}, {NASA Ames}}{GVW}
{Quarter-sized (64 PEs) ILLIAC-IV installed at NASA Ames.}
\event{1972}{{BBN}, {Pluribus}}{GVW}
{BBN builds first Pluribus machines as ARPAnet switch nodes.}
\event{1972}{{Goodyear}, {Staran}}{MCS}
                {Goodyear produces STARAN, a $4{\times}256$ 1-bit PE array processor
                using associative addressing and a FLIP-network.}
\event{1972}{{Burroughs}, {PEPE}}{MCS}
                {Burroughs builds PEPE (Parallel Element Processor Ensemble) with
                $8{\times}36$ processing elements and associative adressing.}
\event{1972}{{ICL}, {DAP}}{GVW}
{Paper studies of massive bit-level parallelism done
by Stewart Reddaway at ICL.
These later lead to development of ICL DAP.}
\event{1972}{{DEC}, {asymmetric multiprocessor}}{JMF,PR}
{TOPS-10 monitor for PDP-10 re-written by DEC
to allow asymmetric multiprocessing.}


\yr{1974}
\event{1974}{{Hoare}, {monitors}}{GVW}
{Tony Hoare describes monitors.}
\event{1974}{{MIT}, {dataflow}}{PGW}
{Jack Dennis and David Misunas at MIT publish first paper describing
a dataflow computer.}
\event{1974}{{IBM}, {IBM~3838}, {array processor}}{HGK}
{IBM 3838 array processor
(a general-purpose digital signal processor) delivered.}
\event{1974}{{ICL}, {DAP}}{GVW}
{Work begins on prototype DAP (Distributed Array Processor) at ICL.}
\event{1974}{{BSP}}{MW}
{Design begins on Burroughs Scientific Processor (BSP).}
\event{1974}{{Denelcor}, {HEP}}{GVW}
{Burton Smith begins designing context-flow
Heterogeneous Element Processor (HEP) for Denelcor.}
\event{1974}{{IBM}, {VECTRAN}, {FORTRAN}}{HGK}
{The IBM language VECTRAN,
a major input to FORTRAN 8X,
developed for the 3838.}


\yr{1975}
\event{1975}{{Dijkstra}, {guarded commands}}{WH}
{Edsger Dijkstra describes guarded commands.}
\event{1975}{{Illiac-IV}}{MW}
{Illiac-IV becomes operational at NASA Ames after concerted
check out effort.}
\event{1975}{{CMU}, {Cm*}}{GVW}
{Work begins at Carnegie-Mellon University on Cm*,
with support from DEC.}
\event{1975}{{Intel}, {iAPX 432}}{GVW}
{Design of iAPX 432 (symmetric multiprocessor) begins at Intel.}
\event{1975}{{CDC}, {Cyber}}{MW}
{Cyber~200 project begins at Control Data.}


\yr{1976}
\event{1976}{{CRI}, {Cray-1}}{MW}
{First Cray-1 delivered to Los Alamos National Laboratory.}
\event{1976}{{Goodyear}, {PEPE}}{MCS}
                {Borroughs delivers PEPE to BMDATC Advanced Research Center,
                Huntsville, Alabama}
\event{1976}{{CDC}, {Flexible Processor}}{MW}
{Control Data delivers Flexible Processor,
a programmable signal processing unit.}
\event{1976}{{FPS}, {array processor}, {LIW}}{BRC}
{Floating Point Systems Inc.\ delivers 38-bit AP-120B
array processor that issues multiple pipelined instructions
every cycle.}
\event{1976}{{FPS}, {software pipelining}, {array processor}}{BRC}
{Floating Point Systems Inc.\ describes loop wrapping,
later called software pipelining,
to program pipelined multiple instruction issue processors.}


\yr{1977}
\event{1977}{{$n_{1/2}$},${r_{\infty}}$,{performance metrics}}{RWH}
{Roger Hockney introduces $n_{1/2}$ and $r_{\infty}$
as metrics for pipelined and other architectures.}
\event{1977}{{CMU}, {C.mmp}}{GVW}
{C.mmp hardware completed at Carnegie-Mellon University
(crossbar connecting minicomputers to memories).}
\event{1977}{{Davis}, {University of Utah}, {Burroughs Corporation}, {DDM1}, {static dataflow}}{PGW}
{Al Davis of the University of Utah, in collaboration with the
Burroughs Corporation, builds the first operational hardware
dataflow processor called the DDM1 (Data-Driven Machine 1).
This is based on the static model of dataflow token scheduling.}
\event{1977}{{Goodyear}, {MPP}}{MW}
{Massively Parallel Processor project first discussed at NASA
for fast image processing.}
\event{1977}{{BLAS}, {standards}, {LINPACK}}{JD}
                {Defacto standards activity started by the linear algebra community
to define basic vector operations used in linear algebra.
The collection is called the Basic Linear Algebra Subprograms or BLAS.
Later the name is changed to the Level 1 BLAS.
Project to develop a portable software package used to solve systems
of linear equation is started, this effort is called
the LINPACK project.}


\yr{1978}
\event{1978}{{Fortune}, {Wyllie}, {PRAM}}{GVW}
{Fortune and Wyllie publish paper describing the PRAM model.}
\event{1978}{{Lamport}, {virtual time}}{GVW}
{Leslie Lamport describes algorithm for creating
partial order on distributed events.}
\event{1978}{{Hoare}, {CSP}}{WH}
{Tony Hoare describes CSP.}
\event{1978}{{Backus}, {FP}, {dataflow}}{PGW}
{John Backus (inventor of Fortran) publishes paper on FP systems,
arguing that dependence on conventional languages
has made the development and use of
non-von Neumann architectures uneconomical,
and has deprived computer architects of
an intellectual foundation for new computers.}
\event{1978}{{Arvind}, {Gostelow}, {Plouffe}, {U-Interpreter}, {dynamic dataflow}, {Id}}{PGW}
{Arvind, Kim Gostelow and Wil Plouffe
(at the University of California, Irvine)
describe the Unravelling Interpreter (U-Interpreter),
which exploits even greater concurrency than
the static dataflow model.
This idea comes to be referred to as the dynamic dataflow model.
The dataflow language Id (Irvine dataflow) is introduced.}
\event{1978}{{BBN}, {Butterfly}}{GVW, HSS}
{BBN begins design of distributed-shared memory machine
based around ``butterfly'' switch,
with its roots in work on perfect-shuffle networks by Stone (1972)
and on Omega networks by Lawrie (1975).}


\yr{1979}
\event{1979}{{Kermani}, {Kleinrock}, {virtual cut-through}, {message routing}}{GVW}
{Parviz Kermani and Leonard Kleinrock describe
the virtual cut-through technique for message routing.}
\event{1979}{{ICL}, {DAP}}{GVW}
{ICL DAP delivered to Queen Mary College, London ---
world's first commercial massively parallel computer.}
\event{1979}{{Inmos}}{GVW}
{Inmos set up by British government to develop and produce
memory chips and microprocessors.}
\event{1979}{{Denelcor}, {HEP}}{GVW}
{First single-processor prototype of Denelcor HEP operational.}
\event{1979}{{dataflow}, {CERT-ONERA}, {LAU}}{PGW}
{The first dataflow multiprocessor (with 32 processors)
becomes operational at CERT-ONERA in Toulouse, France.
It is based on the static model and is known as the LAU system
after its programming language (Language en Assignation Unique).}
\event{1979}{{dataflow}, {TI}, {DDP}}{PGW}
{Texas Instruments begins work on the DDP (Data-Driven Processor),
based on the static model,
and on a FORTRAN compiler to run on it.}
\event{1979}{{IBM}, {RISC}, {IBM~801}}{HGK}
{IBM's John Cocke designs the 801,
the first of what are later called RISC architectures.}
\event{1979}{{BLAS}, {standards}, {Linpack Benchmark}, {Cray-1}}{JD}
                {Level 1 BLAS published/released.
                LINPACK software package complete and released; the LINPACK
                Users' Guide finished; the Linpack Users' Guide contains the
                first LINPACK Benchmark Report, with 17 machines ranging from
the DEC PDP-10 to the Cray 1
which achieves 4 MFLOPS for a $100^2$ matrix
at full precision on a single processor.}


\yr{1980}
\event{1980}{{Schwartz}, {ultracomputer}}{HSS}
{J.~T.\ Schwartz publishes paper describing and analysing
the ultracomputer model,
in which processors are connected in a shuffle/exchange graph.}
\event{1980}{{Teradata}}{GVW}
{Teradata spun off from Citibank to develop
parallel database query computers.}
\event{1980}{{BSP}}{MW}
{Burroughs Scientific Processor project cancelled
after one sale but before delivery.}
\event{1980}{{PPA}}{YO}
{Mitsui Shipbuilding Company installs
a 32-processor ring array called PPA
at Hokkaido University, Japan.}
\event{1980}{{DEC}, {symmetric multiprocessor}}{JMF}
{DEC develops KL10 TOPS-10 based symmetric multiprocessor
(up to three CPUs supported,
but a customer built a five-CPU system).}


\yr{1981}
\event{1981}{{Preparata}, {Vuillemin}, {cube-connected cycles}}{GVW}
{Franco Preparata and Jean Vuillemin describe
the cube-connected cycles topology.}
\event{1981}{{Caltech}, {hypercube}, {Seitz}, {Fox}}{GVW}
{Carver Mead gives seminar on massive parallelism at
California Institute of Technology;
inspires development of Cosmic Cube hypercube at Caltech
by group led by Charles Seitz (computer science)
and Geoffrey Fox (physics).}
\event{1981}{{BBN}, {Butterfly}}{GVW}
{First BBN Butterfly delivered ---
68000s connected through multistage network to disjoint memories,
giving appearance of shared memory.}
\event{1981}{{Intel}, {iAPX 432}}{GVW}
{iAPX~432 prototype completed; Intel abandons project.}
\event{1981}{{DEC}, {VAX}, {asymmetric multiprocessor}}{JMF, PR}
{DEC produces VAX~11/782 asymmetric multiprocessor;
a small number of 4-processor machines (11/784) are built.}
\event{1981}{{CDC}, {Cyber}}{MW}
{Control Data delivers Cyber~205 vector supercomputer.}
\event{1981}{{Manchester}, {dataflow}}{PGW}
{The first dynamic dataflow computer becomes operational
at the University of Manchester.}
\event{1981}{{FPS}, {FPS-164}, {array processor}, {LIW}, {mini-supercomputer}}{BRC}
{Floating Point Systems Inc.\ delivers 64-bit FPS-164
array processor that issues multiple pipelined instructions
every cycle,
start of mini-supercomputer market.}
\event{1981}{{Silicon Graphics}, {IRIS}, {Clark}}{DS}
                {Silicon Graphics Inc.\ is founded in late 1981, by James H.\ Clark
                and others to develop the IRIS, a high-performance
                graphics workstation.}


\yr{1982}
\event{1982}{{Illiac-IV}}{GVW}
{Illiac-IV decommissioned.}
\event{1982}{{CRI}, {Cray-X/MP}}{GVW}
{Steve Chen's group at Cray Research produces first
X/MP machine (2 pipelined processors with shared memory).}
\event{1982}{{Denelcor}, {HEP}}{GVW}
{First Denelcor HEPs installed in US.}
\event{1982}{{S-810}, {Hitachi}}{YO}
{Hitachi introduces S-810/10 and S-810/20 vector supercomputers.}
\event{1982}{{CDC}, {AFP}}{MW}
{Control Data improves Flexible Processor to make
Advanced Flexible Processor.}
\event{1982}{{Caltech}, {hypercube}, {MPI}}{GVW}
{Cosmic Cube hypercube prototype operational at Caltech;
first predecessor of CrOS (Crystalline Operating System) running.}
\event{1982}{{Convex}}{GVW}
{Convex founded to pursue mini-supercomputer market.}
\event{1982}{{Alliant}, {FX/8}}{GVW}
{Alliant founded;
delivers first FX/8 vector multiprocessor machines
using a custom implementation of an
extended Motorola 68020 instruction set.}


\yr{1983}
\event{1983}{{DARPA}}{MW}
{DARPA starts Strategic Computing Initiative, which helps fund
such machines as Thinking Machines Connection Machine,
BB\&N Butterfly, WARP from Carnegie Mellon University
and iWarp from Intel Corp.}
\event{1983}{{Caltech}, {hypercube}, {NCube}}{GVW}
{Full Cosmic Cube hypercube running at Caltech;
work begins on Mark~II.
John Palmer (of Intel) sees Caltech machines,
and leaves Intel to found NCube.}
\event{1983}{{Fujitsu}, {VP-200}}{YO}
{Fujitsu ships first VP-200 vector supercomputer.}
\event{1983}{{NEC}, {SX-1}}{YO}
{NEC introduces SX-1 vector supercomputer.}
\event{1983}{{Goodyear}, {MPP}}{MW}
{Massively Parallel Processor delivered by Goodyear Aerospace
to NASA Goddard.}
\event{1983}{{DEC}, {symmetric multiprocessor}, {VAX}}{JMF}
{Loosely-coupled VAXclusters supported by DEC's VMS operating system.}
\event{1983}{{Myrias}}{GVW}
{Myrias Research founded as spin-off from University of Alberta
to build shared-memory mini-supercomputers.}
\event{1983}{{SCS}}{MW}
{Scientific Computer Systems founded to design
and market a Cray-compatible minisupercomputer.}
\event{1983}{{TMC}}{BMB}
{Thinking Machines Corporation founded;
Sheryl Handler selects Danny Hillis' Ph.D.\ thesis project
as basis for massively-parallel AI supercomputer.}
\event{1983}{{CDC}, {ETA}}{GVW}
{ETA Systems, Inc. spun off from CDC
to develop a new generation of vector supercomputers.}
\event{1983}{{Encore}}{GVW}
{Encore founded.}
\event{1983}{{Sequent}, {Intel}, {iAPX 432}}{GVW,TL}
{Sequent founded.
Several of its founders
are former members of Intel iAPX~432 project.}
\event{1983}{{Linpack Benchmark}, {Cray-1}}{JD}
{Cray-1 with 1 processor achieves 12.5 MFLOPS
on $100^2$ LINPACK.}
\event{1983}{{Occam}}{RS}
{David May publishes first description of Occam,
a concurrent programming language closely associated with the transputer.}
\event{1983}{{SISAL}, {functional languages}}{JF}
{Sisal 1.0 (Streams and Iterations in a Single-Assignment Language)
language definition released by
Lawrence Livermore National Laboratory (LLNL),
Colorado State University,
DEC, and University of Manchester.
A derivative of VAL, the language included array operations,
streams, and iterations.}


\yr{1984}
\event{1984}{{Mehlhorn}, {Vishkin}, {PRAM}, {emulation}}{GVW}
{Kurt Mehlhorn and Uzi Vishkin describe how various classes of PRAM
can simulate one another.
This work forms the basis for Valiant's later work
on random routing and optimality.}
\event{1984}{{Sequent}, {Balance}}{GVW,TL}
{Sequent produces first shared-memory Balance multiprocessors,
using NS32016 microprocessors
and proprietary DYNIX symmetric operating system.}
\event{1984}{{PAX-64J}}{YO}
{Mitsui Shipbuilding Company installs a two-dimensional toroidal
array of processors, PAX-64J,
at the University of Tsukuba, Japan.}
\event{1984}{{CRI}, {Cray-X/MP}}{GVW}
{Cray X/MP family expanded to include 1 and 4 processors.}
\event{1984}{{Caltech}, {hypercube}}{GVW}
{Unimpressed with available commercial machines,
Caltech begins work on Mark~III hypercube.}
\event{1984}{{Intel}, {hypercube}}{GVW}
{Intel Scientific Computers set up by Justin Rattner
to produce commercial hypercube machines.}
\event{1984}{{Multiflow}}{GVW}
{Multiflow founded by Fisher and others from Yale
to produce very long instruction word (VLIW) supercomputers.}
\event{1984}{{Linpack Benchmark}, {Cray X/MP}}{JD}
{Cray X/MP with 1 processor achieves 21 MFLOPS
on $100^2$ LINPACK.}


\yr{1985}
\event{1985}{{Dally}, {Seitz}, {wormhole routing}, {virtual channels}}{WD}
{Dally and Seitz develop model of wormhole routing,
invent virtual channels, and show how to perform
deadlock-free routing using virtual channels.}
\event{1985}{{Pfister}, {Norton}, {hot spots}, {message combining}}{GVW}
{Pfister and Norton analyse effect of hot spots
in multistage networks,
and describe how message combining can ameliorate their effect.}
\event{1985}{{TMC}, {CM-1}}{BMB}
{TMC demonstrates first CM-1 Connection Machine to DARPA.}
\event{1985}{{Denelcor}}{GVW}
{Denelcor closes doors.}
\event{1985}{{IBM}, {IBM~3090}}{HGK}
{IBM introduces 3090 vector processor.}
\event{1985}{{Intel}, {iPSC/1}}{GVW}
{Intel produces first iPSC/1 hypercube
(80286 processors connected through Ethernet controllers).}
\event{1985}{{Inmos}, {transputer}, {Supernode}, {Meiko}}{GVW}
{Inmos produces first (integer) T414 transputer.
Members of implementation group leave to found Meiko,
which demonstrates its first transputer-based Computing Surface
at SIGGRAPH that year.
ESPRIT Supernode project begun to produce floating-point transputer.}
\event{1985}{{Fujitsu}, {VP-400}}{YO}
{Fujitsu introduces VP-400 vector supercomputer.}
\event{1985}{{NEC}, {SX-2}}{PDT}
{First NEC SX-2 vector supercomputer shipped
(6.0 ns clock,
capable of producing 8 floating point results per clock cycle,
up to 256 MByte memory).}
\event{1985}{{NCube}, {NCube/10}}{GVW}
{NCube produces first NCube/10 hypercube
using custom processors.}
\event{1985}{{Teradata}, {DBC/1012}}{GVW}
{Teradata ships first DBC/1012 parallel database query engine
(Intel 8086 processors connected by proprietary tree network).}
\event{1985}{{CDC}, {Cyberplus}}{MW}
{Ring-connected multiprocessor delivered by Control Data,
called the Cyberplus.}
\event{1985}{{FPS}, {FPS-264}, {array processor}, {mini-supercomputer}}{BRC}
{Floating Point Systems Inc.\ delivers FPS-264,
an ECL version of 64-bit FPS-164 array processor that issues
multiple pipelined instructions every cycle.}
\event{1985}{{Convex}, {C1}}{MW}
{Convex ships first single-processor C1 mini-supercomputer.}
\event{1985}{{CRI}, {Cray-2}}{GVW}
{Cray Research produces Cray-2,
with four background processors,
a single foreground processor,
and a 4.1 nsec clock cycle.}
\event{1985}{{IBM}, {IBM~RP3}}{HGK}
{IBM begins RP3 project,
intending to build a scalable shared-memory multiprocessor
using a message-combining switch.}
\event{1985}{{Stellar}}{MW}
{Stellar Computer, Inc., founded by Bill Poduska, former
Apollo Computer founder, to build single-user high-performance
graphics workstations.}
\event{1985}{{Ardent}}{MW}
{Ardent Computer founded by Allen Michels, former founder
of Convergent Technologies, and Gorden Bell, formerly of DEC,
to build machines in competition with Stellar.}
\event{1985}{{Supertek}}{GVW}
{Supertek Computers, Inc. is founded by Mike Fung,
former Hewlett Packard RISC project manager.}
\event{1985}{{Suprenum}, {Giloi}}{MS}
{W.~K.\ Giloi's design chosen as basis for German Suprenum project.}
\event{1985}{{Linpack Benchmark}, {NEC SX-2}}{JD}
{NEC SX-2 with 1 processor achieves 46 MFLOPS
on $100^2$ LINPACK.}
\event{1985}{{SISAL}, {functional languages}}{JF}
{Sisal 1.2 language definition released;
language definition does not change for another seven years.}
\event{1985}{{Gelernter}, {Linda}}{GVW}
{David Gelernter publishes description of Linda language.
Key elements of this later re-appear as
the Linda parallel programming system.}
\event{1985}{{Multilisp}, {Halstead}, {futures}}{GVW}
{Robert Halstead introudces futures
in a paper describing the implementation of Multilisp.}
\event{1985}{{Jefferson}, {timewarp}, {simulation}}{GVW}
{David Jefferson describes how virtual time and time warping
can be used as a basis for speculative distributed simulations.}


\yr{1986}
\event{1986}{{Dally}, {k-ary n-cubes}, {hypercubes}, {wormhole routing}}{WD}
{Dally shows that low-dimensional k-ary n-cubes are more
wire-efficient than hypercubes for typical values of network
bisection, message length, and module pinout.
Dally demonstrates the torus routing chip, the first
low-dimensional wormhole routing component.}
\event{1986}{{Li}, {shared virtual memory}}{GVW}
{Kai Li describes system for emulated shared virtual memory.}
\event{1986}{{Encore}, {Multimax}}{GVW}
{Encore ships first bus-based Multimax computer
(NS32032 processors coupled with Weitek floating-point accelerators).}
\event{1986}{{TMC}, {CM-1}}{GVW}
{Thinking Machines Corp. ships first Connection Machine CM-1
(up to 65536 single-bit processors connected in hypercube).}
\event{1986}{{SCS}}{GVW}
{Scientific Computer Systems delivers first SCS-40,
a Cray-compatible minisupercomputer.}
\event{1986}{{CMU}, {GE}, {Warp}}{JRR}
{GE installs a prototype 10 processor Warp system at CMU
(programmable bit-slice VLIW systolic array).}
\event{1986}{{Linpack Benchmark}, {Cray X/MP}}{JD}
{Cray X/MP with 4 processors achieves 713 MFLOPS
(against a peak of 840)
on $1000^2$ LINPACK.}
\event{1986}{{FPS}, {T-series}, {transputer}}{BRC}
{Floating Point Systems introduces T-series hypercube
(Weitek floating-point units coupled to transputers),
and ships 128-processor system to Los Alamos.}
\event{1986}{{KSR}}{GVW}
{Henry Burkhardt, former Data General and Encore founder,
forms Kendall Square Research Corporation (KSR)
to build custom multiprocessor.}
\event{1986}{{BBN}}{GVW}
{BBN forms Advanced Computers Inc.\ subsidiary (BBN ACI)
to develop and market Butterfly machines.}
\event{1986}{{AMT}, {ICL}, {DAP}}{GVW}
{Active Memory Technology spun off from ICL to develop DAP products.}
\event{1986}{{Level 2 BLAS}}{JD}
                {Level 2 BLAS activity started.}
\event{1986}{{hypercube}, {MPI}}{GVW}
{CrOS~III, Cubix (file-system handler) and Plotix (graphics handler)
running on Caltech hypercubes.}
\event{1986}{{DEC}, {symmetric multiprocessor}, {VAX}}{JMF}
{Symmetric multiprocessing supported by VMS.}


\yr{1987}
\event{1987}{{ETA}}{GVW}
{ETA produces first air- and liquid nitrogen-cooled versions
of ${\rm{ETA}}^{10}$ multiprocessor supercomputer.}
\event{1987}{{Myrias}, {SPS-1}}{GVW}
{Myrias produces prototype (68000-based) SPS-1.}
\event{1987}{{Caltech}, {hypercube}}{GVW}
{Caltech Mark~III hypercube completed (68020 with wormhole routing).}
\event{1987}{{TMC}, {CM-2}}{GVW}
{TMC introduces CM-2 Connection Machine
(64k single-bit processors connected in hypercube,
plus 2048 Weitek floating point units).}
\event{1987}{{Sequent}, {Symmetry}}{GVW,TL}
{Sequent produces 80386-based Symmetry bus-based multiprocessor.}
\event{1987}{{Multiflow}, {Trace/200}}{GVW}
{Multiflow delivers first Trace/200 VLIW machines
(256 to 1024 bits per instruction).}
\event{1987}{{CMU}, {GE}, {Warp}}{JRR}
{GE installs the first 10-processor production Warp system at CMU.}
\event{1987}{{Seitz}, {Ametek}, {Ametek-2010}, {wormhole routing}}{WD}
{Seitz, working at Ametek, builds the Ametek-2010,
the first parallel computer
using a 2-D mesh interconnect with wormhole routing.}
\event{1987}{{CRI}, {SSI}}{MW}
{Steve Chen leaves Cray Research to found
Supercomputer Systems, Inc.
SSI is later funded by IBM to build
large-scale parallel supercomputer.}
\event{1987}{{Gordon Bell Prize}}{GVW}
{Gordon Bell Prize for parallel performance first awarded;
recipients are Brenner, Gustafson, and Montry,
for a speedup of 400-600 on variety of applications
running on a 1024-node NCube;
and Chen, DeBenedictis, Fox, Li, and Walker,
for speedups of 39-458 on various hypercubes.}
\event{1987}{{Linpack Benchmark}, {ETA 10}, {NEC SX-2}}{JD}
{ETA~10 with 1 processor achieves 52 MFLOPS
on $100^2$ LINPACK;
NEC SX-2 with 1 processor achieves 885 MFLOPS
(against a peak of 1300)
on $1000^2$ LINPACK.}
\event{1987}{{SISAL}, {functional languages}}{JF}
{SC (SISAL Compiler) released by LLNL and Colorado State University.
First functional language, native-code compiler and runtime system
for shared-memory multiprocessor systems.}
\event{1987}{{Express}, {ParaSoft}, {hypercube}, {MPI}}{GVW}
{ParaSoft spun off from hypercube group at Caltech
to produce commercial version of CrOS-like MPI.}


\yr{1988}
\event{1988}{{scalability}, {Gustafson}}{GVW}
{John Gustafson and others demonstrate that
Amdahl's Law can be broken
by scaling up problem size.}
\event{1988}{{Inmos}, {transputer}}{GVW}
{Inmos produces first T800 floating-point transputer;
Parsys and Telmat set up to exploit results of
ESPRIT Supernode project,
and begin marketing T800-based machines.}
\event{1988}{{Silicon Graphics}, {Power Series}}{DS}
                {Silicon Graphics delivers the Power Series graphics workstations
                (bus-based multiprocessor workstations and servers
with up to 8 MIPS R2000 RISC microprocessors).}
\event{1988}{{CRI}, {Cray-Y/MP}}{GVW}
{CRI produces first Y/MP multiprocessor vector supercomputer.}
\event{1988}{{AMT}, {DAP}}{GVW}
{AMT delivers first re-engineered DAP
(1024 single-bit processors connected in torus).}
\event{1988}{{Intel}, {iPSC/2}}{GVW}
{Intel produces iPSC/2 hypercube
(80386/7 chip-set with wormhole routing,
plus concurrent I/O facilities).}
\event{1988}{{Stellar}, {Ardent}}{GVW}
{Ardent and Stellar begin delivering single-user graphics
engineering workstations.}
\event{1988}{{Hitachi}, {S-820}}{YO}
{Hitachi ships first S-820 vector supercomputer.}
\event{1988}{{Occam}}{RS}
{Definition of Occam2 concurrent programming language published.}
\event{1988}{{dataflow}, {SIGMA-1}, {ETL}}{PGW}
{The 128 processing-element SIGMA-1 dataflow machine
of Japan's Electro-Technical Laboratory (ETL)
delivers over 100 MFLOPS.}
\event{1988}{{FPS}, {Celerity}}{BRC}
                {Floating Point Systems Inc.\ changes name to FPS Computing,
buys Celerity Computing assets,
and produces Model 500 (Celerity 6000)
mini-supercomputer with multiple scalar and vector processors.}
\event{1988}{{DEC}, {MasPar}}{MW}
{MasPar Computer Corp. founded by former DEC executive Jeff Kalb
to develop bit-serial massively-parallel machines.}
\event{1988}{{Tera}}{LSK}
{Tera Computer Co.\ founded by Burton Smith and James Rottsolk to
develop and market a new multi-threaded parallel computer,
similar to the Denelcor HEP.}
\event{1988}{{SCI}}{DBG}
{Scalable Coherent Interface (SCI) working group formed
to develop standard for interconnection network providing
1~GByte per second per processor and cache coherence
using many unidirectional point-to-point links.}
\event{1988}{{Linpack Benchmark}, {Cray Y/MP}}{JD}
{Cray Y/MP with 1 processor achieves 74 MFLOPS
on $100^2$ LINPACK;
the same machine with 8 processors achieves 2.1 GFLOPS
(against a peak of 2.6)
on $1000^2$ LINPACK.}
\event{1988}{{Gordon Bell Prize}}{GVW}
{Gordon Bell Prize awarded to Vu, Simon, Ashcraft, Grimes, and Peyton,
whose static structures program achieved
1~GFLOPS on an 8-processor Cray Y/MP.}
\event{1988}{{Level 2 BLAS}, {Level 3 BLAS}, {LAPACK}}{JD}
                {Level 2 BLAS published/released;
Level 3 BLAS activity started;
LAPACK project started. LAPACK effort to produce software for
linear algebra problems
on shared memory parallel computers and high-performance workstations.}
\event{1988}{{ParaSoft}, {Express}, {MPI}, {Caltech}, {DIME}}{GVW}
{ParaSoft releases first commercial version of Express MPI;
first version of DIME (Distributed Irregular Mesh Environment)
up and running at Caltech.}


\yr{1989}
\event{1989}{{Valiant}, {random routing}, {PRAM}, {emulation}}{GVW}
{Valiant argues that random routing and latency hiding
can allow physically-realizable machines
to emulate PRAMs in optimal time.}
\event{1989}{{SCS}}{MW}
{Scientific Computer Systems stops selling its SCS-40
Cray-compatible computer system.
SCS continues to sell high-speed token ring network.}
\event{1989}{{BBN}, {TC2000}}{GVW}
{BBN ACI delivers first 88000-based TC2000
distributed shared-memory multiprocessor.}
\event{1989}{{Myrias}, {SPS-2}}{GVW}
{Myrias sell first 68020-based SPS-2
shared-memory multiprocessor.}
\event{1989}{{Meiko}, {Computing Surface}}{GVW}
{Meiko begin using SPARC and Intel i860 processors
to supplement T800s in their Computing Surface machines;
begins integrating products with SunOS enviornment.}
\event{1989}{{ES-1}}{MW}
{Evans and Sutherland announce the ES-1 parallel computer.
Two systems are delivered, to the University of Colorado and
CalTech. The division is later shut down
during the Supercomputing '89 conference, even while
they had a booth in the convention center in Reno.}
\event{1989}{{Multiflow}, {Trace/300}}{MW}
{Multiflow produces second-generation Trace/300 machines.}
\event{1989}{{Fujitsu}, {VP2000}}{GVW}
{Fujitsu begins production of single-processor VP2000
vector supercomputers.}
\event{1989}{{Supertek}}{MW}
{Supertek Computers, Inc., delivers its S-1 Cray-compatible
minisupercomputer; eventually 10 of these are sold.}
\event{1989}{{CDC}, {ETA}}{MW}
{Control Data shuts down ETA Systems in April;
National Science Foundation subsequently shuts down
the John von Neumann Supercomputer Center at Princeton,
which was operating an ETA-10.}
\event{1989}{{Stellar}, {Ardent}, {Stardent}}{MW}
{Stellar and Ardent announce they will merge, forming
Stardent Computers.}
\event{1989}{{CRI}, {CCC}}{GVW}
{Seymour Cray leaves Cray Research to found
Cray Computer Corporation.}
\event{1989}{{Monsoon}, {dataflow}, {Motorola}, {MIT}, {Arvind}}{PGW}
{Arvind's group at MIT receives first hardware prototype of
MONSOON tagged-token architecture from Motorola.}
\event{1989}{{Gordon Bell Prize}}{GVW}
{Gordon Bell Prize for absolute performance awarded to
a team from Mobil and Thinking Machines Corporation,
who achieved 6~GFLOPS on a CM-2 Connection Machine;
prize in price/performance category awarded to Emeagwali,
who achieved 400 MFLOPS per million dollars on the same platform.}
\event{1989}{{Linpack Benchmark}, {Cray Y/MP}}{JD}
{Cray Y/MP with 8 processors achieves 275 MFLOPS
on $100^2$ LINPACK,
and 2.1 GFLOPS (against a peak of 2.6)
on $1000^2$ LINPACK.}
\event{1989}{{SISAL}, {functional languages}}{JF}
{OSC (Optimizing SISAL Compiler) released by LLNL and CSU.
The compiler optimizes the copy and memory management;
SISAL programs achieve Fortran speeds on conventional
shared-memory multiprocessors.}
\event{1989}{{NCube}, {NCube/2}}{MW}
{NCube produces second-generation NCube/2 hypercubes,
again using custom processors.}
\event{1989}{{Portland Group}}{LFM}
{The Portland Group (PGI) founded to develop software
pipelining compilers
for the Intel i860 and other machines.}


\yr{1990}
\event{1990}{{Multiflow}}{MW}
{Multiflow closes doors in April after several deals
with other companies fall through.}
\event{1990}{{MasPar}, {MP-1}}{GVW}
{First MasPar MP-1 delivered
(up to 16k 4-bit processors connected in 8-way mesh).}
\event{1990}{{NEC}, {SX-3}}{PDT}
{NEC ships SX-3,
the first Japanese parallel vector supercomputer
(up to 4 processors, each with up to 4 pipeline sets,
a 2.9 ns clock,
and up to 4 Gbyte of memory).}
\event{1990}{Fujitsu, VP-2600}{YO}
{Fujitus ships first VP-2600 vector supercomputer.}
\event{1990}{{Alliant}, {FX/2800}}{GVW}
{Alliant delivers first FX/2800 i860-based multiprocessors.}
\event{1990}{{Fujitsu}, {NEC}, {Hitachi}, {HPPS}}{OY}
{In a project led by MITI,
Fujitsu, Hitachi, and NEC build
a testbed parallel vector supercomputer containing
four Fujitsu VP2600s,
NEC's shared memory,
and Hitachi software.}
\event{1990}{{Intel}, {iPSC/860}}{RJ}
{Intel produces iPSC/860 hypercubes,
using i860 microprocessor and wormhole-routed connections.}
\event{1990}{{Intel}, {iWarp}}{JRR}
{Intel demonstrates iWarp system to CMU and DARPA
(descendent of Warp,
with custom microprocessor replacing wire-wrapped boards).}
\event{1990}{{Wavetracer}, {DTC}}{MCS}
                {Wavetracer builds the DTC (Data Transport Computer)
                consisting of one to four boards of $16{\times}16{\times}16$ 1-bit
                PEs, virtual array size, first three-dimensional array processor.}
\event{1990}{{Cray}, {Supertek}}{MW}
{Cray Research, Inc., purchases Supertek Computers Inc.,
makers of the S-1, a minisupercomputer compatible
with the Cray X-MP.}
\event{1990}{{Dally}, {J-Machine}, {Actors model}}{WD}
{MIT J-Machine demonstrates message-driven network
interface that reduces overhead of message handling.}
\event{1990}{{CCC}, {Cray-3}, {NERSC}}{MW}
{National Energy Research Supercomputer Center (NERSC)
places order with Cray Computer Corporation
for Cray-3 supercomputer.
The order includes a unique 8-processor
Cray-2 computer system that is installed in April.}
\event{1990}{{QCDPAX}, {Anritsu}}{YO}
{University of Tsukuba completes 432 processor machine QCDPAX
in collaboration with Anritsu Corporation.}
\event{1990}{{ETA}}{MW}
{The two ETA-10 systems at the closed John von Neumann
Supercomputer Center are destroyed with sledge hammers,
in order to render them useless, after no buyers are found.}
\event{1990}{{Gordon Bell Prize}}{GVW}
{Gordon Bell Prize in price/performance category
awarded to Geist, Stocks, Ginatempo, and Shelton,
who achieved 800~MFLOPS per million dollars
in a high-temperature superconductivity program
on a 128-node Intel iPSC/860;
prize in compiler parallelization category awarded to
Sabot, Tennis, and Vasilevsky,
who achieved 1.5~GFLOPS on a CM-2 Connection Machine
with Fortran~90 code derived from Fortran~77.}
\event{1990}{{Linpack Benchmark}, {Fujitsu VP2600}}{JD}
{Fujitsu VP2600 with 1 processor achieves 2.9 GFLOPS
(against a peak of 5 GFLOPS)
on $1000^2$ LINPACK.}
\event{1990}{{Level 3 BLAS}, {PVM}}{JD}
                {Level 3 BLAS published/released.
                The Parallel Virtual Machine (PVM) project started.
                PVM is designed to develop a software layer needed to put
                together a heterogeneous collection of computers hooked together
                by a network to be used as a single large parallel computer.
                Proof of concept software produced (PVM 1.0 not publicly released).}
\event{1990}{{APR}, {FORGE}, {MIMDizer}, {PSR}}{BMB}
{Applied Parallel Resarch (APR) spun off from
Pacific-Sierra Research (PSR) to develop FORGE and MIMDizer
parallelization tools,
and upgrade them to handle Fortran~90.}
\event{1990}{{data-parallel languages}, {TMC}, {AMT}}{1990}
{TMC and AMT sign co-operative agreement to standardize languages.}




\yr{1991}
\event{1991}{{Ranade}, {butterfly}, {PRAM}, {emulation}}{GVW}
{Abhiram Ranade describes how message combining,
butterfly networks,
and a complicated routing algorithm
can emulate PRAMs in near-optimal time.}
\event{1991}{{Myrias}}{GVW}
{Myrias closes doors.}
\event{1991}{{BBN}}{MW}
{BBN shuts down its Advanced Computers, Inc. (ACI) subsidiary,
though it continues to sell TC-2000 computers.}
\event{1991}{{Stardent}}{MW}
{Stardent, formed by merger in 1989, announces it will sell off
its business and shut its doors.
The graphics computer line (the former Ardent architecture)
is eventually taken over by Kubota Pacific Computer Corp.}
\event{1991}{{CRI}, {Cray-Y/MP C90}}{GVW}
{CRI produces first Y/MP~C90.}
\event{1991}{{KSR}}{MW}
{Kendall Square Research starts to deliver 32-processor
KSR-1 computer systems.}
\event{1991}{{TMC}, {CM-200}}{BMB}
{Thinking Machines Corporation produces CM-200 Connection Machine,
an upgraded CM-2.
MIMD CM-5 announced.}
\event{1991}{{Linpack Benchmark}, {Cray Y/MP C90}, {Fujitsu VP2600}}{JD}
{Cray Y/MP C90 with 16 processors achieves 403 MFLOPS
on $100^2$ LINPACK;
a Fujitsu VP2600 with 1 processor achieves 4 GFLOPS
(against a peak of 5 GFLOPS)
on $1000^2$ LINPACK.}
\event{1991}{{Intel}, {iWarp}}{JRR}
{Intel introduces the iWarp system,
featuring the iWarp LIW processor with
on-chip integrated communication,
long lived connections, systolic and low-latency communication,
and 512~kbyte to 2~Mbyte per processor.}
\event{1991}{{Intel}, {Paragon}}{RJ}
{Intel delivers Touchstone Delta prototype
for its Paragon multicomputer
(two-dimensional mesh of i860 microprocessors
with wormhole routing)
to the Concurrent Supercomputing Consortium at Caltech;
commercial deliveries of Paragon begin late in the year.}
\event{1991}{{FPS}, {MCP-784}}{BRC}
                {FPS Computing delivers MCP-784,
an 84-processor shared memory i860-based system,
                uses data-vectorization into caches.}
\event{1991}{{CCC}, {Cray-3}}{MW}
{In December,
the National Energy Research Supercomputer Center (NERSC)
at Lawrence Livermore National Laboratory
cancels contract to buy Cray-3 from Cray Computer Corp.}
\event{1991}{{Suprenum}}{MS}
{Germany's Suprenum project produces first bug-free hardware.
Machine contains nodes based on MC68020 with Weitek
floating point accelerator;
clusters contain 16 nodes communicating over a bus,
and clusters are connected through bi-directional links.
No further hardware is built,
as the technology used was no longer competitive.}
\event{1991}{{HPF}}{LFM}
{The High Performance Fortran (HPF) forum is formed to define
data-parallel extensions to Fortran.}
\event{1991}{{SISAL}, {functional languages}}{JF}
{OSC 12.0, released by LLNL and CSU.
First functional language compiler for
multiprocessor vector supercomputers.
SISAL programs achieve Fortran speeds on the Cray-X/MP
and Cray-Y/MP supercomputers.}
\event{1991}{{Bailey}, {benchmarking}}{GVW}
{David Bailey publishes complaint about abuse of benchmarks,
particularly by parallel computer vendors.}
\event{1991}{{Meiko}, {Computing Surface}, {Oracle}}{TA}
{Meiko produces commercial implementation of ORACLE Parallel Server
RDBMS for multi-SPARC Computing Surface systems.}


\yr{1992}
\event{1992}{{Gibson}, {RAID}}{GVW}
{Garth Gibson's thesis on redundant arrays of inexpensive disks
(RAID) published.}
\event{1992}{{Alliant}}{LFM}
{Alliant declares bankruptcy.}
\event{1992}{{AMT}}{MW}
{AMT bankrupt; revived as AMT Cambridge Ltd.}
\event{1992}{{FPS}, {CRI}}{BRC}
                {FPS Computing bankrupt; selected assets bought by CRI,
and Cray Research Superservers (CRS) subsidiary formed.
FPS Model 500 renamed Cray S-MP;
FPS MCP renamed Cray APP.}
\event{1992}{{KSR}}{MW}
{Kendall Square Research announces KSR-1 after testing
a system with 128 processors and a second level ring interconnect.}
\event{1992}{{MasPar}}{MW}
{MasPar Computer starts delivering its second generation machine,
the MP-2.}
\event{1992}{{TMC}, {CM-5}}{BMB}
{Thinking Machines Corporation produces first CM-5,
containing up to 1024 Sparc microprocessors
connected in a fat tree topology,
each with up to 4 vector units
manufactured by Texas Instruments.
A RAID system for the CM-5 is also announced.}
\event{1992}{{Gordon Bell Prizes}}{GVW}
{Gordon Bell Prize for absolute performance awarded to
Warren and Salmon,
who achieved 5~GFLOPS on the Intel Touchstone Delta
in a gravitational interaction tree code;
prize for speedup awarded to Jones and Plassmann,
who also achieved 5~GFLOPS on the same platform.
Prize for price/performance awarded to Nakanishi, Rego, and Sunderam,
whose Eclipse system achieved 1~GIPS per million dollars
on a widely distributed network of workstations.}
\event{1992}{{Linpack Benchmark}, {Cray Y/MP C90}, {NEC SX-3}}{JD}
{Cray Y/MP C90 with 16 processors achieves 479 MFLOPS
on $100^2$ LINPACK;
an NEC SX-3/44 with 4 processors achieves 13.4 GFLOPS
(against a peak of 22.0)
on $1000^2$ LINPACK,
and 20.0 GFLOPS on a $6144^2$ problem.}
\event{1992}{{LAPACK}, {ScaLAPACK}, {MPI}}{JD}
                {LAPACK software released/users guide published.
ScaLAPACK Project started, designed to provide linear algebra software
on highly parallel systems.
Message Passing Interface (MPI) Forum started, standardizing effort
for message passing systems.}
\event{1992}{{PCN}, {Chandy}, {Taylor}}{GVW}
{Chandy and Taylor describe PCN,
a parallel programming system similar to Strand~88,
based on dataflow and logic programming.}


\yr{1993}
\event{1993}{{IBM}{RS/6000}}{HGK}
{IBM delivers first Powerparallel system based on RISC RS/6000 processor.}
\event{1993}{{Silicon Graphics}, {Challenge}}{DS}
                {Silicon Graphics ships Challenge series of bus-based multiprocessor
graphics workstations and servers,
containing up to 36 MIPS R4400 RISC microprocessors.}
\event{1993}{{SSI}}{MW}
{IBM stops funding of Supercomputer Systems Inc.;
company shuts down.}
\event{1993}{{CCC}, {Cray-3}}{EAB}
{Cray Computer Corp. Cray-3 placed at
National Center for Atmospheric Research.}
\event{1993}{{Meiko}, {LLNL}}{GVW}
{Lawrence Livermore National Laboratory (LLNL)
announces intention to purchase CS-2 Computing Surface from Meiko,
the first major purchase by a U.S.\ national laboratory
from a vendor with roots outside the U.S.}
\event{1993}{{Fujitsu}, {VPP-500}}{YO}
{Fujitsu installs 140-processor Numerical Wind Tunnel,
a prototype of a highly-parallel vector supercomputer
to be called VPP-500.}
\event{1993}{{NEC}, {CENJU-3}}{PDT}
{NEC produces Cenju-3,
containing up to 256 VR4400SC (MIPS R4000 runalike) processors
connected by an Omega network.}
\event{1993}{{IBM}{GF-11}}{HGK}
{GF-11 system (the name stands for 11 GFLOPS)
purpose-built at IBM for quantum chromodynamic calculations
finishes computation of nucleon masses.}
\event{1993}{{J-Machine}, {MIT}, {Caltech}, {Actors model}}{WD}
{512-node J-Machines (message-driven multicomputers) operational
at MIT and Caltech.}
\event{1993}{{HPF}}{LFM}
{Version 1.0 of the HPF language specific is released.}
\event{1992}{{Linpack Benchmark}, {NEC SX-3}, {CM-5}}{JD}
{An NEC SX-3/44 with 4 processors achieves 15.1 GFLOPS
(against a peak of 25.0)
on $1000^2$ LINPACK;
a Thinking Machines Corporation CM-5 achieves
59.7 GFLOPS with 1024 processors
on a $52224^2$ problem.}
\event{1993}{{ScaLAPACK}, {PVM}}{JD}
                {ScaLAPACK Prototypes released, runs on Intel's Paragon, Thinking
Machines' CM-5, and PVM.
PVM 3.0 publicly available.}


\end{description}


\end{document}

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