Re: Thompson's 2c vs. gcc

meissner@osf.org
Fri, 5 Feb 1993 23:39:31 GMT

          From comp.compilers

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Newsgroups: comp.compilers
From: meissner@osf.org
Keywords: architecture, GCC
Organization: Compilers Central
References: 93-01-205 93-02-057
Date: Fri, 5 Feb 1993 23:39:31 GMT



Joe Buck writes:
| It wasn't just that [MIPS gcc 1.x] was not well tuned. It did not have an
| instruction scheduler and could not fill delayed branch slots. gcc-2 does
| both. I understand that this makes a difference of about 30% on the
| Sparc; the number is probably similar on the MIPS. gcc-1 did a good job
| on the CISC architectures (Vax and 680x0) it was initially designed for.


Actually the number is not similar on the MIPS. The reason is that the
MIPS assembler does low level instruction scheduling (though I don't
recall whether gcc 1.35 and such passed -O to the assembler, but I think
it did). I did put in scheduling and branch delay slot filling support in
Gcc 2.x for the MIPS (because for the OSF/1 Pmax reference platform, we
used GAS as the assembler, and it doesn't do instruction scheduling).


One big win that Gcc 2.xx has (and later versions of gcc-osf-1.39 if you
used -O2) is that it uses a constant frame (providing you don't use
alloca), rather than continually pushing and popping items from the stack
pointer, and eliminating the frame pointer in most cases, freeing up
another saved register. There were other places where it definately
needed a tuneup, and hopefully it is reasonably tuned now.
--
Michael Meissner email: meissner@osf.org phone: 617-621-8861
Open Software Foundation, 11 Cambridge Center, Cambridge, MA, 02142
--


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