MICRO-25 Advance Program

                                                                ADVANCE PROGRAM


                                                                      MICRO-25
          THE 25th ANNUAL ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE


                                                      with special emphasis on
                              Instruction-Level Parallel Processing Technology


                                    The Portland Hilton, Portland, Oregon, USA
                                                            December 1-4, 1992




On behalf of the MICRO-25 Program Committee, I would like to invite you to
attend this special quarter-century International Symposium on Microarchi-
tecture in Portland, Oregon, on December 1-4, 1992.


This year, the Program Committee has selected an outstanding set of papers
out of a large number of strong submissions. The papers were rigorously
reviewed by external referees as well as the Program Committee members.
The papers were selected for their technical excellence, with an emphasis
on their originality and quality of presentation.


In addition to paper presentations, this 25th anniversary meeting of MICRO
will feature a series of invited lectures and panels delivered by
prominent researchers and designers from leading industrial corporations.
The lectures will focus on critical components of the instruction-level
parallel processing technology. In particular, these lectures will cover
new directions for research and development in compilers and
microarchitectures.


The symposium will be held at the Portland Hilton which is ideally located
in the heart of Portland downtown. As many of you know already, the Port-
land downtown area is beautifully landscaped with many attractions.
Within walking distance, there are over 50 restaurants, the Performing
Arts Center, the Nike Town, the Portland Art Museum, the Oregon Historical
Society, Nordstrorm, Saks Fifth Avenue, The Galleria, Pioneer Place, and
the Yamhill Marketplace. Some of us may even want to take advantage of
shopping without paying sales tax in Oregon. This unique environment prom-
ises to offer all of us a productive yet relaxing week at the symposium.


For the last quarter century, the annual MICRO conference has been a key
forum for presenting major breakthroughs in computer microarchitecture.
In particular, its technical papers have made significant contributions to
the technologies underlying VLIW and superscalar processors. Last year's
MICRO-24 was the first of the major conferences with instruction-level
parallelism as its primary focus. With the instruction-level parallel
processing technology developing rapidly, this year's conference promises
to be the premier forum for discussion and debate on this technology. We
invite all leading researchers and designers to participate in this land-
mark meeting in Portland to discuss new directions in instruction-level
parallel processing.


Wen-mei Hwu
Chair, MICRO-25




                                                            Tuesday, December 1




      8:00 - 8:30 Breakfast




      8:30 - 9:00 Opening remarks: Wen-mei Hwu, Chairman, MICRO-25,
                                  Yashwant Malaiya, Chairman, IEEE TC-Micro, Joe Linn, Chair-
                                  man, ACM SigMicro




      9:00 - 10:00 Keynote: Yale Patt - Professor, University of Michigan, Ann
                                  Arbor, Partner, Belgard & Patt (U.S.A.)




    10:00 - 10:30 Coffee Break




    10:30 - 12:00 Session: Exploiting Instruction-Level Parallelism - I


    "An Investigation of the Performance of Various Dynamic Scheduling Tech-
              niques"
              Michael Butler, Yale Patt - University of Michigan, Ann Arbor (U.S.A.)


    "On the Limits of Program Parallelism and its Smoothability"
              Kevin B. Theobald, Guang R. Gao, Laurie J. Hendren - McGill University
              (CANADA)


    "On the Instruction-Level Characteristics of Scalar Code in Highly-
              Vectorized Scientific Applications"
              Sriram Vajapeyam, Wei-Chung Hsu - Cray Research, Inc. (U.S.A)




    12:00 - 1:15 Lunch Break (on your own)




      1:15 - 2:15 Session: Exploiting Instruction Level Parallelism - II


    "Exploiting Instruction-Level Parallelism with the Conjugate Register File
              Scheme"
              Meng-chou Chang, Feipei Lai, Rung-ji Shang - National Taiwan Univer-
              sity (R.O.C.)


    "Limitation of Superscalar Microprocessor Performance"
              Thang Tran - Advanced Micro Devices (U.S.A.), Chuan-lin Wu - Univer-
              sity of Texas, Austin (U.S.A.)


    "Branch Merging for Effective Exploitation of Instruction-Level Parallel-
              ism"
              Chien-Ming Chen, Yunn-Yen Chen, Chung-Ta King - National Tsing Hua
              University (R.O.C.)


    "A Non-Deterministic Scheduler for a Software Pipelining Compiler"
              Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri - University of
              Genoa (ITALY)




      2:15 - 2:30 Short Recess




      2:30 - 3:30 Invited Lecture: "Mapping ideal instruction-level
                                  parallelism into reality,"
                                  Josh Fisher - Hewlett-Packard Laboratories (U.S.A.)




      3:30 - 4:00 Coffee Break




      4:00 - 5:30 Session: Global Scheduling Techniques - I


    "Effective Compiler Support for Predicated Execution Using the Hyperblock"
              Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger
              A. Bringmann - University of Illinois, Urbana-Champaign (U.S.A.)


    "An Efficient Resource-Constrained Global Scheduling Technique for Super-
              scalar and VLIW processors"
              Soo-Mook Moon, Kemal Ebcioglu - IBM T.J. Watson Research Center
              (U.S.A.)


    "Enhanced Region Scheduling on a Program Dependence Graph"
              V.H. Allan, J. Janardhan, R.M. Lee - Utah State University (U.S.A.)




      6:30 - 7:30 Welcoming Reception










                                                          Wednesday, December 2




      8:30 - 9:00 Breakfast




      9:00 - 10:00 Invited Lecture: "Exploiting Instruction-Level
                                  Parallelism with Vectors,"
                                  James Smith - CRAY Research (U.S.A.)




    10:00 - 10:30 Coffee Break


    10:30 - 12:00 Session: Memory System Issues - I


    "Executing Compressed Programs on An Embedded RISC Architecture"
              Andrew Wolfe, Alex Chanin - Princeton University (U.S.A.)


    "An Efficient Architecture for Loop Based Data Preloading"
              William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank,
              James E. Sicolo - University of Illinois, Urbana-Champaign (U.S.A.)


    "Stride Directed Prefetching in Scalar Processors" John W.C. Fu - Intel
              (U.S.A.), Janak H. Patel, Bob L. Janssens - University of Illinois,
              Urbana-Champaign (U.S.A.)




    12:00 - 1:15 Lunch Break (on your own)




      1:15 - 2:15 Session: Microarchitecture Design and Analysis


    "Controlling and Sequencing a Heavily Pipelined Floating-point Operator"
              Andre Seznec, Karl Courtel - IRISA Campus de Beaulieu (FRANCE)


    "Data Path Issues in a Highly Concurrent Machine"
              Augustus K. Uht - University of Rhode Island (U.S.A.), Darin B. John-
              son - University of California, San Diego (U.S.A.)


    "A VLIW Architecture For Optimal Execution of Branch-Intensive Loops"
              Bogong Su, Wei Zhao, Zhizhong Tang - Tsinghua University (CHINA),
              Stanley Habib - City College of New York (U.S.A).


    "Y-Pipe: An Uninterruptable Conditional Branching Scheme"
              Michael J. Knieser, Cristos A. Papachristou - Case Western Reserve
              University (U.S.A.)




      2:15 - 2:30 Short Recess




      2:30 - 3:30 Panel: "Real Superscalar Products: How are we doing?"
                                  Moderator: Bob Colwell - Intel Corporation (U.S.A.)
                                  Organizer: Andy Glew - Intel Corporation (U.S.A.)




      3:30 - 4:00 Coffee Break


      4:00 - 5:30 Session: Advanced Microarchitecture Support


    "A Comprehensive Instruction Fetch Mechanism for a Processor Supporting
              Speculative Execution"
              Tse-Yu Yeh, Yale Patt - University of Michigan, Ann Arbor (U.S.A.)


    "Microarchitecture Support for Dynamic Scheduling of Acyclic Task Graphs"
              Carl J. Beckmann, Constantine D. Polychronopoulos - University of
              Illinois, Urbana-Champaign (U.S.A)


    "Interlock Collapsing ALU for Increased Instruction-Level Parallelism"
              Nadeem Malik--IBM Endicott (U.S.A), Richard J. Eickemeyer--IBM Roches-
              ter (U.S.A), Stamatis Vassiliadis--IBM Poughkeepsie (U.S.A).




      6:30 - 7:00 Social Hour


      7:00 - 9:00 Quarter-century Banquet: The First Annual Microprogramming
                                  Bowl. Your Host: Rich Belgard, Partner, Patt & Belgard
                                  (U.S.A.)










                                                          Thursday, December 3




      8:30 - 9:00 Breakfast




      9:00 - 10:00 Invited Lecture: "VLIW: It's not your father's Oldsmobile,"
                                  B. Ramakrishna Rau (or Bob Rau) - Hewlett-Packard Labora-
                                  tories (U.S.A.)




    10:00 - 10:30 Coffee Break




    10:30 - 12:00 Session: Loop Scheduling and Software Pipelining


    "Code Generation Schema for Modulo Scheduled Loops" B.R. Rau, M.S.
              Schlansker, P.P. Tirumalai - Hewlett-Packard Laboratories (U.S.A.)


    "Enhanced Modulo Scheduling for Loops with Conditional Branches"
              Nancy J. Warter - University of Illinois, Urbana-Champaign
              (U.S.A.), John W. Bockhaus - Hewlett-Packard (U.S.A), Grant E. Haab,
              Krishna Subramanian - University of Illinois, Urbana-Champaign
              (U.S.A.)


    "A Dynamic-Programming Technique for Compacting Loops"
              Steven R. Vegdahl - Adaptive Solutions, Inc. (U.S.A.)


    12:00 - 1:15 Lunch Break (on your own)




      1:15 - 2:00 Session: Exploiting Instruction-Level Parallelism - III


    "Exploiting Instruction-Level Parallelism: The Multithreaded Approach"
              Philip Lenir, R. Govindarajan, S.S. Nemawarkar - McGill University
              (CANADA)


    "MISC: A Multiple Instruction Stream Computer"
              Gary Tyson, Matthew Farrens, Andrew R. Pleszkun - University of Cali-
              fornia, Davis (U.S.A.)


    "Code Scheduling for VLIW/Superscalar Processors with Limited Register
              Files"
              Tokuzo Kiyohara - Matsushita Electric Industrial Co., Ltd. (JAPAN),
              John C. Gyllenhaal - University of Illinois, Urbana-Champaign (U.S.A.)




      2:00 - 3:30 Session: Memory System Issues - II


    "Tradeoffs in Processor/Memory Interfaces for Superscalar Processors"
              Thomas M. Conte - University of South Carolina, Columbia (U.S.A.)


    "Translation Hint Buffers To Reduce Access Time Of Physically Addressed
              Instruction Caches"
              Brian K. Bray, Michael Flynn - Stanford University (U.S.A.)


    "Modifying VM Hardware to Reduce Address Pin Requirements"
              Arvin Park, Matthew Farrens, and Gary Tyson - University of Califor-
              nia, Davis (U.S.A.)


    "Toward Zero-Cost Branches Using Instruction Registers"
              Kent D. Wilken, David W. Goodwin - University of California, Davis
              (U.S.A.)


    "Ordering Functions For Improving Memory Reference Locality In a Shared
              Memory Multiprocessor System"
              Youfeng Wu - Sequent Computer Systems, Inc. (U.S.A)


    "The Effect of Page Allocation on Caches"
              William L. Lynch, Brian K. Bray, Michael Flynn - Stanford University
              (U.S.A.)




      3:30 - 4:00 Coffee Break




      4:00 - 5:30 Session: Performance and Design Analysis


    "Performance Evaluation of Instruction Scheduling on the IBM RISC Sys-
              tem/6000"
              David Bernstein, Doron Cohen, Yuval Lavon, Vladimir Rainish - IBM
              Israel Scientific Center (ISRAEL)


    "Register Traffic Analysis for Streamlining Inter-Operation Communication
              in Fine-Grain Parallel Processors"
              Manoj Franklin, Gurindar S. Sohi - University of Wisconsin-Madison
              (U.S.A.)


    "Performance Analysis and Design Methodology for a Scalable Superscalar
              Architecture"
              Takaaki Kato - NKK Electronics Research Division (JAPAN), Toshihisa
              Ono - NKK LSI Division (JAPAN), Nader Bagherzadeh - University of Cal-
              ifornia, Irvine (U.S.A.)




      8:00 - 10:00 ACM SigMicro and IEEE TC-Micro Business Meeting
                                  MICRO Annual Shoot-out










                                                            Friday, December 4




      8:30 - 9:00 Breakfast




      9:00 - 10:00 Session: Global Scheduling Techniques - II




    "Lookahead Scheduling"
              Steven J. Beaty - Colorado State University (U.S.A.)


    "Dominator-Path Scheduling --- A Global Scheduling Method"
              Philip H. Sweany - Michigan Technological University (U.S.A.), Steven
              J. Beaty - Colorado State University (U.S.A.)


    "A Shape Matching Approach for Scheduling Fine-Grained Parallelism"
              Brian Malloy - Clemson University (U.S.A.), Rajiv Gupta, Mary Lou
              Soffa - University of Pittsburgh (U.S.A.)


    "A New Approach to Schedule Operations Across Nested-ifs and Nested-loops"
              Shih-Hsu Huang - National Taiwan University (R.O.C.), Cheng-Tsung
              Hwang - University of California, Riverside (U.S.A.), Yu-Chin Hsu -
              University of California, Riverside (U.S.A.), Yen-Jen Oyang - National
              Taiwan University (R.O.C.)




    10:00 - 10:30 Coffee Break




    10:30 - 12:00 Session: Design and Analysis of Superscalar/VLIW
                                  Microarchitectures


    "An Out-of-Order Superscalar Processor with Speculative Execution and Fast,
              Precise Interrupts"
              Harry Dwyer - IBM Austin (U.S.A.), H.C. Torng - Cornell University
              (U.S.A.)


    "Stacs: A Static Control Superscalar Architecture"
              Benoit Dupont de Dinechin - C.E.A., Centre d'Etudes de Limeil-Valenton
              (FRANCE)


    "Partitioned Register-Files for VLIWs: A Preliminary Analysis of Tradeoffs"
              Andrea Capitanio - University of Padova (ITALY), Nikil Dutt, Alexandru
              Nicolau - University of California, Irvine (U.S.A.)




    12:00 - 1:30 Award Luncheon, Symposium Report and Concluding remarks.




                                      Micro-25 Advance Registration Information




                                                          December 1 - 4, 1992
                                                          Portland, Oregon USA




Please read the following instructions carefully.


1. Conference registration fee (IEEE members, non-members, students)
includes the following:
    - Tuesday Welcoming Reception, Wednesday Banquet, Friday Award Luncheon,
    - a copy of the Conference proceedings, and
    - a souvenir.


2. Full payment in U.S. dollars must accompany registration. Any regis-
tration forms sent without payment will not be accepted.


3. Advance registration must be postmarked no later than Nov. 1, 1992.


4. REFUND POLICY: No refunds will be made unless written request for can-
cellation is received before Nov. 15, 1992. All refunds are subject to a
$35 processing fee.


5. Checks/money orders must be made out to MICRO-25. No credit cards are
accepted.


REGISTRATION DESK
Advance registrants may pick up the Conference materials and others may
register during the Conference at the registration desk located in the
Portland Hilton on the second floor (Mezzanine area).


ON-SITE REGISTRATION
On-site registration will begin at 8:30 am on Tuesday, December 1. Only
cash/traveler's checks or checks are accepted. No credit cards are
accepted.




REGISTRATION HOURS
Monday, November 30, 4 -7 p.m. and during all Conference Breakfast or Cof-
fee Break hours.


ANY OTHER QUESTIONS?
Please contact the Conference Administration Coordinator, Sabrina Hwu.
    E-mail: sabrina@crhc.uiuc.edu
    2603 Cherry Hills Drive
    Champaign, IL 61821, USA
    (217) 244-8270 (o)


                                          Micro-25 Advance Registration Form




                                                          December 1 - 4, 1992
                                                          Portland, Oregon USA


    PLEASE TYPE OR PRINT LEGIBLY.


    Name _____________________________________________________________


    Company/Affiliation ______________________________________________


    Address __________________________________________________________


    City _______________________________ State _____ Zip ___________


    Country ___________________ Phone _______________________________


    E-mail Address ___________________________________________________


    IEEE/ACM Membership No. __________________________________________


    CONFERENCE FEES:




                                                                              Advance Late/On-site


                                    IEEE/ACM Members $270 $325
                                    Non-members $335 $405
                                    Full-time Students $180 $215




    Total Amount enclosed ___________________________________________


    All advance registrations must be postmarked no later than November 1,
    1992. On-site Conference payments must be made by check or cash. No
    credit cards will be accepted. No refunds unless cancellation is received
    before November 15, 1992. All refunds are subject to a $35 fee.


    Make checks payable to Micro-25.


    Please mail registration form and check to:


              Sabrina Hwu
              2603 Cherry Hills Drive
              Champaign, IL 61821, USA


                                      Micro-25 Hotel Reservation Information


                                                          December 1 - 4, 1992
                                          The Portland Hilton, Portland, OR USA


Before completing the Hotel Reservation Form on the next page, please read
the following important information:


Hotel reservation can be made either one of the following ways.
        (1) Mail the Hotel Reservation Form directly to the Portland Hilton:
                        The Portland Hilton
                        921 S.W. Sixth Avenue
                        Portland, OR 97204-1296


        (2) Call the hotel directly:


          1-503-499-4244 within U.S. 1-800-268-9275 within Canada
          0120-489-852 within Asia 0-800-289-303 within Europe




        (3) Fax the Hotel Reservation Form directly to the hotel at (503) 220-
        2565.


The reservation cut-off date is November 9, 1992 at 5:00 pm PT. Reserva-
tions received after the cut-off date will be accepted on a space
available basis at the conference rate. Please make your reservation
early.


The check-in time is 3:00 pm. Guests are permitted to check-in earlier
subject to room availability. The check-out time is 12:00 noon.


To guarantee a reservation, the Portland Hilton requires a deposit
covering the first night room rate plus 9% sales tax. The deposit can be
made either (1) send a check or money order, or (2) send a signed letter
and a major credit card number authorizing the hotel to charge the
deposit, or (3) give a major credit card by telephone. For people that
will arrive after 6:00 pm, their reservations must be accompanied by the
deposit to guarantee their rooms. Guaranteed reservations are held until
6:00 am the following morning, at which time the reservation and deposit
are forfeited. To guarantee a full refund, cancellation must be made 48
hours prior to the arrival date.


Up to two children, regardless of age, may stay free when occupying the
same room as their parents.


Limited number of handicapped rooms are available upon request.


                                              Micro-25 Hotel Reservation Form


                                                          December 1 - 4, 1992
                                          The Portland Hilton, Portland, OR USA
    Please check you preference:


    HOTEL ROOM RATES: ____ SINGLE (one person, one bed) $85
                                            ____ DOUBLE (two people, one bed) $85
                                            ____ TWIN (two people, two bed) $95








    PLEASE TYPE OR PRINT LEGIBLY.


    Name _________________________________________________________________
                                                Last First


    Name _________________________________________________________________
                                                Last First


    Company/Affiliation __________________________________________________


    Address ______________________________________________________________


    City _______________________________ State ________ Zip ____________


    Country _______________________ Phone _______________________________


    Arrival Date _________________________ Time _________________________


    Departure Date _______________________ Time _________________________


    Check Enclosed: _______ Deposit Amount Enclosed: ____________________


    ____ VISA ____ Mastercard ____ American Express


    ____ Discover ____ JCB ____ Carte Blanche


    Number ________________________________________ Exp. Date ____________


    Signature ____________________________________________________________


                                                                    Announcing


                                                  MICRO-25 Student Travel Grant


          I am pleased to announce the MICRO-25 student travel grant. The grant
amount is $350 for each recipient. The purpose of the grant is to supple-
ment the advisors' research grants or the students' fellowship travel
allowance to make attending MICRO-25 more affordable. The details of the
grant are given below:


(1) Students who are presenting papers at MICRO-25 will be given higher
          priority in the selection process. We expect to have approximately 30
          recipients this year.


(2) Student applicants should fill out the enclosed application form and
          e-mail the application to Sabrina Hwu (sabrina@crhc.uiuc.edu) by
          October 20, 1992. Receipt of the application will be acknowledged
          immediately. The decision will be sent to the applicants by November
          1, 1992.


(3) The grant checks will be sent to the recipients AFTER the conference.
          Each grant recipient is required to send in a one-page summary of
          his/her experience with MICRO-25 after the conference via e-mail to
          sabrina@crhc.uiuc.edu. The check will be delivered after we receive
          the report.


(4) The grant recipients are still required to pay the conference regis-
          tration fee. Note that all student participants will be entitled to
          ALL Micro-25 events and proceedings in spite of the lower registration
          fee for students.


    Wen-mei Hwu
    Chair, MICRO-25


                                MICRO-25 Student Travel Grant Application Form




    Name:


    Affiliation:


    Expected degree and graduation date:


    Area of research:


    Name of advisor:


    Postal address for sending the grant check:


    E-mail address:


    Paper title (if presenting a paper at MICRO-25):


    Have you published at MICRO before? If so, please list the years:






    Program Committee




              Vicki Allan, Utah State


              Richard Belgard, Consultant


              James Bondi, Texas Instruments


              Pohua Chang, Intel


              Robert Colwell, Intel


              Kemal Ebcioglu, IBM


              Josh Fisher, Hewlett-Packard


              Mike Flynn, Stanford


              Stanley Habib, CUNY


              Wen-mei Hwu, U. Illinois


              Gearold Johnson, Colo. State


              Joseph Linn, Microsoft


              Bill Mangione-Smith, Motorola


              Hans Mulder, Intel


              Toshio Nakatani, IBM Japan


              Alex Nicolau, UC Irvine


              Chris Papachristou, Case Western


              Yale Patt, U. Michigan


              Bob Rau, Hewlett-Packard


              John Shen, CMU


              Will Tracz, IBM


              Gus Uht, UCSD


              Andrew Wolfe, Princeton




    General and Program Chair




              Wen-mei W. Hwu


              Department of Electrical and Computer Engineering


              University of Illinois


              1101 W. Springfield Ave.


              Urbana, IL 61801, USA


              hwu@crhc.uiuc.edu


              (217) 244-8270, -5686 FAX




    Steering Committee




              Richard Belgard, Consultant


              Gearold Johnson, Colorado State


              Joseph Linn, Microsoft


              Yashwant Malaiya, Colorado State


              Yale Patt, U. Michigan




    Local Arrangements Chair




              Pohua Chang, Intel, pohua@ichips.intel.com




    Administration Coordinator




              Sabrina Hwu, U. of Illinois, sabrina@crhc.uiuc.edu


              (217) 244-8270, -5686 FAX
--

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