|Register Files firstname.lastname@example.org (1992-10-05)|
|Re: Register Files email@example.com (1992-10-05)|
|Re: Register Files firstname.lastname@example.org (1992-10-06)|
|Re: Register Files email@example.com (1992-10-06)|
|Re: Register Files firstname.lastname@example.org (1992-10-06)|
|Re: Register Files email@example.com (1992-10-07)|
|Re: Register Files firstname.lastname@example.org (1992-10-07)|
|Re: Register Files email@example.com (1992-10-07)|
|Re: Register Files ali@LARK.WARP.CS.CMU.EDU (Ali-Reza Adl-Tabatabai) (1992-10-22)|
|Re: Register Files idacrd!desj@uunet.UU.NET (1992-10-23)|
|From:||firstname.lastname@example.org (Barton Christopher Massey)|
|Organization:||University of Oregon Computer and Information Sciences Dept.|
|Date:||Wed, 7 Oct 1992 08:21:21 GMT|
|Keywords:||registers, optimize, comment|
email@example.com (Steve Simmons) writes:
> [machines with separate register sets] can fetch, decode and execute both an
> integer and a floating point instruction on the same cycles.
> Be careful about some of the hype in the marketing literature. The Intel
> i860 has been doing that for 4 years now.
Much earlier, the 11/70 did this. Some predecessors of mine at
Reed built a nice numerical ODE solver which did this in
handcrafted assembly, and did about double the speed. Then the
11/785 came along and the overlap was gone -- a sad waste of
hard work :-).
[Overlapped integer and floating operations have been common for years. The
360/91 did so in a very complicated way in 1969, and the Intel 8087 ran in
parallel with the 8086 in about 1978. -John]
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