More work on Lunde's architecture papers?

Hi!


        I just came across an article from Amund Lunde (CACM Vol.20, No.3.
March 77) "Empirical Evaluation of Some Features of Instruction Set
Processor Architectures". It is part of a IEEE tutorial on RISC. It
describes a register usage and operator utility analysis method by tracing
executions with ISP interpretors. The research was done at Carnegie-Mellon
but finger lunde@cs.cmu.edu rings no bell, so I wonder if anyone knows
about subsequent, parallel, (or anyway) related work. I plan to use this
as a base for a project for undergraduates in a computer architecture
course, it should be something like a comparison between a M68020 and a
SPARC. Has anyone tried this?


Thanks


Marcel Achim
achim@info.uqam.ca
Universite du Quebec a Montreal
Departement Maths-Info


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